Commit 38284b57 authored by Huacai Chen's avatar Huacai Chen Committed by Hongchen Zhang
Browse files

LoongArch: Add PCI controller support 

mainline inclusion
from mainline-v6.0-rc1
commit 57fc7323
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5OHOB


CVE: NA

--------------------------------

Loongson64 based systems are PC-like systems which use PCI/PCIe as its
I/O bus, This patch adds the PCI host controller support for LoongArch.

Reviewed-by: default avatarWANG Xuerui <git@xen0n.name>
Signed-off-by: default avatarJianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent eefa16cd

arch/loongarch/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ config LOONGARCH 
	default y

	select ACPI

	select ACPI_GENERIC_GSI if ACPI

	select ACPI_MCFG if ACPI

	select ACPI_SYSTEM_POWER_STATES_SUPPORT	if ACPI

	select ARCH_BINFMT_ELF_STATE

	select ARCH_ENABLE_MEMORY_HOTPLUG
@@ -89,6 +90,7 @@ config LOONGARCH 
	select HAVE_IRQ_TIME_ACCOUNTING

	select HAVE_MOD_ARCH_SPECIFIC

	select HAVE_NMI

	select HAVE_PCI

	select HAVE_PERF_EVENTS

	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_RSEQ
@@ -103,6 +105,11 @@ config LOONGARCH 
	select NEED_PER_CPU_PAGE_FIRST_CHUNK

	select OF

	select OF_EARLY_FLATTREE

	select PCI

	select PCI_DOMAINS_GENERIC

	select PCI_ECAM if ACPI

	select PCI_LOONGSON

	select PCI_MSI_ARCH_FALLBACKS

	select PERF_USE_VMALLOC

	select RTC_LIB

	select SMP

arch/loongarch/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -47,6 +47,8 @@ cflags-y += $(call cc-option, -mno-check-zero-division) 
load-y		= 0x9000000000200000

bootvars-y	= VMLINUX_LOAD_ADDRESS=$(load-y)



drivers-$(CONFIG_PCI)		+= arch/loongarch/pci/



KBUILD_AFLAGS	+= $(cflags-y)

KBUILD_CFLAGS	+= $(cflags-y)

KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(load-y)

arch/loongarch/include/asm/dma.h

0 → 100644
+13 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited

 */

#ifndef __ASM_DMA_H

#define __ASM_DMA_H



#define MAX_DMA_ADDRESS	PAGE_OFFSET

#define MAX_DMA32_PFN	(1UL << (32 - PAGE_SHIFT))



extern int isa_dma_bridge_buggy;



#endif

arch/loongarch/include/asm/irq.h

+0 −8
Original line number Diff line number Diff line
@@ -97,16 +97,8 @@ struct irq_domain *htvec_acpi_init(struct irq_domain *parent, 
					struct acpi_madt_ht_pic *acpi_htvec);

int pch_lpc_acpi_init(struct irq_domain *parent,

					struct acpi_madt_lpc_pic *acpi_pchlpc);

#if IS_ENABLED(CONFIG_LOONGSON_PCH_MSI)

int pch_msi_acpi_init(struct irq_domain *parent,

					struct acpi_madt_msi_pic *acpi_pchmsi);

#else

static inline int pch_msi_acpi_init(struct irq_domain *parent,

					struct acpi_madt_msi_pic *acpi_pchmsi)

{

	return 0;

}

#endif

int pch_pic_acpi_init(struct irq_domain *parent,

					struct acpi_madt_bio_pic *acpi_pchpic);

int find_pch_pic(u32 gsi);

arch/loongarch/include/asm/page.h

+0 −2
Original line number Diff line number Diff line
@@ -33,8 +33,6 @@ 
#include <linux/kernel.h>

#include <linux/pfn.h>



#define MAX_DMA32_PFN  (1UL << (32 - PAGE_SHIFT))



/*

 * It's normally defined only for FLATMEM config but it's

 * used in our early mem init code for all memory models.