Unverified Commit 381abc23 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-6.2-clk-v2' of... 

Merge tag 'tegra-for-6.2-clk-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

clk: tegra: Changes for v6.2-rc1

Implements new ABI flags for certain clocks for which the parent rate
or clock state cannot be changed.

* tag 'tegra-for-6.2-clk-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: Support BPMP-FW ABI deny flags

Link: https://lore.kernel.org/r/20221121171239.2041835-3-thierry.reding@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents a6eeafba 1d9e77b6

drivers/clk/tegra/clk-bpmp.c

+34 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (C) 2016-2020 NVIDIA Corporation

 * Copyright (C) 2016-2022 NVIDIA Corporation

 */



#include <linux/clk-provider.h>
@@ -310,6 +310,23 @@ static const struct clk_ops tegra_bpmp_clk_mux_rate_ops = { 
	.set_rate = tegra_bpmp_clk_set_rate,

};



static const struct clk_ops tegra_bpmp_clk_mux_read_only_ops = {

	.get_parent = tegra_bpmp_clk_get_parent,

	.recalc_rate = tegra_bpmp_clk_recalc_rate,

};



static const struct clk_ops tegra_bpmp_clk_read_only_ops = {

	.recalc_rate = tegra_bpmp_clk_recalc_rate,

};



static const struct clk_ops tegra_bpmp_clk_gate_mux_read_only_ops = {

	.prepare = tegra_bpmp_clk_prepare,

	.unprepare = tegra_bpmp_clk_unprepare,

	.is_prepared = tegra_bpmp_clk_is_prepared,

	.recalc_rate = tegra_bpmp_clk_recalc_rate,

	.get_parent = tegra_bpmp_clk_get_parent,

};



static int tegra_bpmp_clk_get_max_id(struct tegra_bpmp *bpmp)

{

	struct cmd_clk_get_max_clk_id_response response;
@@ -510,8 +527,22 @@ tegra_bpmp_clk_register(struct tegra_bpmp *bpmp, 
	memset(&init, 0, sizeof(init));

	init.name = info->name;

	clk->hw.init = &init;



	if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) {

	if (info->flags & BPMP_CLK_STATE_CHANGE_DENIED) {

		if ((info->flags & BPMP_CLK_RATE_PARENT_CHANGE_DENIED) == 0) {

			dev_WARN(bpmp->dev,

				"Firmware bug! Inconsistent permission bits for clock %s. State and parent/rate changes disabled.",

				 init.name);

		}

		if (info->flags & TEGRA_BPMP_CLK_HAS_MUX)

			init.ops = &tegra_bpmp_clk_mux_read_only_ops;

		else

			init.ops = &tegra_bpmp_clk_read_only_ops;

	} else if (info->flags & BPMP_CLK_RATE_PARENT_CHANGE_DENIED) {

		if (info->flags & TEGRA_BPMP_CLK_HAS_MUX)

			init.ops = &tegra_bpmp_clk_gate_mux_read_only_ops;

		else

			init.ops = &tegra_bpmp_clk_gate_ops;

	} else if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) {

		if (info->flags & TEGRA_BPMP_CLK_HAS_SET_RATE)

			init.ops = &tegra_bpmp_clk_mux_rate_ops;

		else