Commit 37ef3346 authored by Srinivas Neeli's avatar Srinivas Neeli Committed by Bartosz Golaszewski
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gpio: gpio-xilinx: Reduce spinlock array to array 



Changed spinlock array to single. It is preparation for irq support which
is shared between two channels that's why spinlock should be only one.

Signed-off-by: default avatarSrinivas Neeli <srinivas.neeli@xilinx.com>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarBartosz Golaszewski <bgolaszewski@baylibre.com>
parent 45c5277f

drivers/gpio/gpio-xilinx.c

+12 −13
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ struct xgpio_instance { 
	unsigned int gpio_width[2];

	u32 gpio_state[2];

	u32 gpio_dir[2];

	spinlock_t gpio_lock[2];

	spinlock_t gpio_lock;	/* For serializing operations */

	struct clk *clk;

};
@@ -113,7 +113,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 
	int index =  xgpio_index(chip, gpio);

	int offset =  xgpio_offset(chip, gpio);



	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Write to GPIO signal and set its direction to output */

	if (val)
@@ -124,7 +124,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 
	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +

		       xgpio_regoffset(chip, gpio), chip->gpio_state[index]);



	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);

}



/**
@@ -144,7 +144,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 
	int index = xgpio_index(chip, 0);

	int offset, i;



	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Write to GPIO signals */

	for (i = 0; i < gc->ngpio; i++) {
@@ -155,9 +155,9 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 
			xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +

				       index * XGPIO_CHANNEL_OFFSET,

				       chip->gpio_state[index]);

			spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

			spin_unlock_irqrestore(&chip->gpio_lock, flags);

			index =  xgpio_index(chip, i);

			spin_lock_irqsave(&chip->gpio_lock[index], flags);

			spin_lock_irqsave(&chip->gpio_lock, flags);

		}

		if (__test_and_clear_bit(i, mask)) {

			offset =  xgpio_offset(chip, i);
@@ -171,7 +171,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 
	xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +

		       index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);



	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);

}



/**
@@ -190,14 +190,14 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 
	int index =  xgpio_index(chip, gpio);

	int offset =  xgpio_offset(chip, gpio);



	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Set the GPIO bit in shadow register and set direction as input */

	chip->gpio_dir[index] |= BIT(offset);

	xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +

		       xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);



	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);



	return 0;

}
@@ -221,7 +221,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 
	int index =  xgpio_index(chip, gpio);

	int offset =  xgpio_offset(chip, gpio);



	spin_lock_irqsave(&chip->gpio_lock[index], flags);

	spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Write state of GPIO signal */

	if (val)
@@ -236,7 +236,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 
	xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +

			xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);



	spin_unlock_irqrestore(&chip->gpio_lock[index], flags);

	spin_unlock_irqrestore(&chip->gpio_lock, flags);



	return 0;

}
@@ -312,7 +312,7 @@ static int xgpio_probe(struct platform_device *pdev) 
	if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))

		chip->gpio_width[0] = 32;



	spin_lock_init(&chip->gpio_lock[0]);

	spin_lock_init(&chip->gpio_lock);



	if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))

		is_dual = 0;
@@ -336,7 +336,6 @@ static int xgpio_probe(struct platform_device *pdev) 
					 &chip->gpio_width[1]))

			chip->gpio_width[1] = 32;



		spin_lock_init(&chip->gpio_lock[1]);

	}



	chip->gc.base = -1;