Commit 37da6ed2 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos3250 

The soc node is supposed to have only device nodes with MMIO addresses,
as reported by dtc W=1:

  exynos3250.dtsi:775.20-781.5:
    Warning (simple_bus_reg): /soc/bus-dmc: missing or empty reg/ranges property

and dtbs_check:

  exynos3250-artik5-eval.dtb: soc: bus-dmc:
    {'compatible': ['samsung,exynos-bus'], 'clocks': [[67, 16]], 'clock-names': ['bus'], 'operating-points-v2': [[68]], 'status': ['disabled']} should not be valid under {'type': 'object'}

Move the bus nodes and their OPP tables out of SoC to fix this.
Re-order them alphabetically while moving and put some of the OPP tables
in device nodes (if they are not shared).

Link: https://lore.kernel.org/r/20230125094513.155063-3-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent eb87086b

arch/arm/boot/dts/exynos3250.dtsi

+176 −176
Original line number Diff line number Diff line
@@ -46,6 +46,157 @@ 
		serial2 = &serial_2;

	};



	bus_dmc: bus-dmc {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu_dmc CLK_DIV_DMC>;

		clock-names = "bus";

		operating-points-v2 = <&bus_dmc_opp_table>;

		status = "disabled";



		bus_dmc_opp_table: opp-table {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

				opp-microvolt = <800000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

				opp-microvolt = <800000>;

			};

			opp-134000000 {

				opp-hz = /bits/ 64 <134000000>;

				opp-microvolt = <800000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

				opp-microvolt = <825000>;

			};

			opp-400000000 {

				opp-hz = /bits/ 64 <400000000>;

				opp-microvolt = <875000>;

			};

		};

	};



	bus_fsys: bus-fsys {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_ACLK_200>;

		clock-names = "bus";

		operating-points-v2 = <&bus_leftbus_opp_table>;

		status = "disabled";

	};



	bus_isp: bus-isp {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_ACLK_266>;

		clock-names = "bus";

		operating-points-v2 = <&bus_isp_opp_table>;

		status = "disabled";



		bus_isp_opp_table: opp-table {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

			};

			opp-300000000 {

				opp-hz = /bits/ 64 <300000000>;

			};

		};

	};



	bus_lcd0: bus-lcd0 {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_ACLK_160>;

		clock-names = "bus";

		operating-points-v2 = <&bus_leftbus_opp_table>;

		status = "disabled";

	};



	bus_leftbus: bus-leftbus {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_GDL>;

		clock-names = "bus";

		operating-points-v2 = <&bus_leftbus_opp_table>;

		status = "disabled";

	};



	bus_mcuisp: bus-mcuisp {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;

		clock-names = "bus";

		operating-points-v2 = <&bus_mcuisp_opp_table>;

		status = "disabled";



		bus_mcuisp_opp_table: opp-table {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

			};

			opp-400000000 {

				opp-hz = /bits/ 64 <400000000>;

			};

		};

	};



	bus_mfc: bus-mfc {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_SCLK_MFC>;

		clock-names = "bus";

		operating-points-v2 = <&bus_leftbus_opp_table>;

		status = "disabled";

	};



	bus_peril: bus-peril {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_ACLK_100>;

		clock-names = "bus";

		operating-points-v2 = <&bus_peril_opp_table>;

		status = "disabled";



		bus_peril_opp_table: opp-table {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

		};

	};



	bus_rightbus: bus-rightbus {

		compatible = "samsung,exynos-bus";

		clocks = <&cmu CLK_DIV_GDR>;

		clock-names = "bus";

		operating-points-v2 = <&bus_leftbus_opp_table>;

		status = "disabled";

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -129,6 +280,31 @@ 
		clock-output-names = "xtcxo";

	};



	bus_leftbus_opp_table: opp-table-0 {

		compatible = "operating-points-v2";



		opp-50000000 {

			opp-hz = /bits/ 64 <50000000>;

			opp-microvolt = <900000>;

		};

		opp-80000000 {

			opp-hz = /bits/ 64 <80000000>;

			opp-microvolt = <900000>;

		};

		opp-100000000 {

			opp-hz = /bits/ 64 <100000000>;

			opp-microvolt = <1000000>;

		};

		opp-134000000 {

			opp-hz = /bits/ 64 <134000000>;

			opp-microvolt = <1000000>;

		};

		opp-200000000 {

			opp-hz = /bits/ 64 <200000000>;

			opp-microvolt = <1000000>;

		};

	};



	pmu {

		compatible = "arm,cortex-a7-pmu";

		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -771,182 +947,6 @@ 
			clock-names = "ppmu";

			status = "disabled";

		};



		bus_dmc: bus-dmc {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu_dmc CLK_DIV_DMC>;

			clock-names = "bus";

			operating-points-v2 = <&bus_dmc_opp_table>;

			status = "disabled";

		};



		bus_dmc_opp_table: opp-table-1 {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

				opp-microvolt = <800000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

				opp-microvolt = <800000>;

			};

			opp-134000000 {

				opp-hz = /bits/ 64 <134000000>;

				opp-microvolt = <800000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

				opp-microvolt = <825000>;

			};

			opp-400000000 {

				opp-hz = /bits/ 64 <400000000>;

				opp-microvolt = <875000>;

			};

		};



		bus_leftbus: bus-leftbus {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_GDL>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_rightbus: bus-rightbus {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_GDR>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_lcd0: bus-lcd0 {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_160>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_fsys: bus-fsys {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_200>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_mcuisp: bus-mcuisp {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;

			clock-names = "bus";

			operating-points-v2 = <&bus_mcuisp_opp_table>;

			status = "disabled";

		};



		bus_isp: bus-isp {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_266>;

			clock-names = "bus";

			operating-points-v2 = <&bus_isp_opp_table>;

			status = "disabled";

		};



		bus_peril: bus-peril {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_100>;

			clock-names = "bus";

			operating-points-v2 = <&bus_peril_opp_table>;

			status = "disabled";

		};



		bus_mfc: bus-mfc {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_SCLK_MFC>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_leftbus_opp_table: opp-table-2 {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

				opp-microvolt = <900000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

				opp-microvolt = <900000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

				opp-microvolt = <1000000>;

			};

			opp-134000000 {

				opp-hz = /bits/ 64 <134000000>;

				opp-microvolt = <1000000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

				opp-microvolt = <1000000>;

			};

		};



		bus_mcuisp_opp_table: opp-table-3 {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

			};

			opp-400000000 {

				opp-hz = /bits/ 64 <400000000>;

			};

		};



		bus_isp_opp_table: opp-table-4 {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

			opp-200000000 {

				opp-hz = /bits/ 64 <200000000>;

			};

			opp-300000000 {

				opp-hz = /bits/ 64 <300000000>;

			};

		};



		bus_peril_opp_table: opp-table-5 {

			compatible = "operating-points-v2";



			opp-50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp-80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp-100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

		};

	};

};