Commit 37cfd90d authored by Fabrice Gasnier's avatar Fabrice Gasnier Committed by sanglipeng
Browse files

pwm: stm32-lp: fix the check on arr and cmp registers update 

stable inclusion
from stable-v5.10.173
commit 9d4a4a9ee95e054ad2384421f91acd823ceee021
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8BFR3

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=9d4a4a9ee95e054ad2384421f91acd823ceee021



--------------------------------

[ Upstream commit 3066bc2d ]

The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the
register isn't correctly updated.
So ensure both status bits are set before clearing them.

Fixes: e70a540b ("pwm: Add STM32 LPTimer PWM driver")
Signed-off-by: default avatarFabrice Gasnier <fabrice.gasnier@foss.st.com>
Acked-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarsanglipeng <sanglipeng1@jd.com>
parent 1ce9a5a4

drivers/pwm/pwm-stm32-lp.c

+1 −1
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, 


	/* ensure CMP & ARR registers are properly written */

	ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,

				       (val & STM32_LPTIM_CMPOK_ARROK),

				       (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK,

				       100, 1000);

	if (ret) {

		dev_err(priv->chip.dev, "ARR/CMP registers write issue\n");