Commit 374b30f2 authored by Ricardo Ribalda's avatar Ricardo Ribalda Committed by Greg Kroah-Hartman
Browse files

earlycon: Let users set the clock frequency 



Some platforms, namely AMD Picasso, use non standard uart clocks (48M),
witch makes it impossible to use with earlycon.

Let the user select its own frequency.

Signed-off-by: default avatarRicardo Ribalda <ribalda@chromium.org>
Reviewed-by: default avatarJiri Slaby <jirislaby@kernel.org>
Link: https://lore.kernel.org/r/20221123-serial-clk-v3-1-49c516980ae0@chromium.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5dc4c995

Documentation/admin-guide/kernel-parameters.txt

+7 −5
Original line number Diff line number Diff line
@@ -1195,10 +1195,10 @@ 
			specified, the serial port must already be setup and

			configured.



		uart[8250],io,<addr>[,options]

		uart[8250],mmio,<addr>[,options]

		uart[8250],mmio32,<addr>[,options]

		uart[8250],mmio32be,<addr>[,options]

		uart[8250],io,<addr>[,options[,uartclk]]

		uart[8250],mmio,<addr>[,options[,uartclk]]

		uart[8250],mmio32,<addr>[,options[,uartclk]]

		uart[8250],mmio32be,<addr>[,options[,uartclk]]

		uart[8250],0x<addr>[,options]

			Start an early, polled-mode console on the 8250/16550

			UART at the specified I/O port or MMIO address.
@@ -1207,7 +1207,9 @@ 
			If none of [io|mmio|mmio32|mmio32be], <addr> is assumed

			to be equivalent to 'mmio'. 'options' are specified

			in the same format described for "console=ttyS<n>"; if

			unspecified, the h/w is not initialized.

			unspecified, the h/w is not initialized. 'uartclk' is

			the uart clock frequency; if unspecified, it is set

			to 'BASE_BAUD' * 16.



		pl011,<addr>

		pl011,mmio32,<addr>

drivers/tty/serial/earlycon.c

+8 −1
Original line number Diff line number Diff line
@@ -120,7 +120,13 @@ static int __init parse_options(struct earlycon_device *device, char *options) 
	}



	if (options) {

		char *uartclk;



		device->baud = simple_strtoul(options, NULL, 0);

		uartclk = strchr(options, ',');

		if (uartclk && kstrtouint(uartclk + 1, 0, &port->uartclk) < 0)

			pr_warn("[%s] unsupported earlycon uart clkrate option\n",

				options);

		length = min(strcspn(options, " ") + 1,

			     (size_t)(sizeof(device->options)));

		strscpy(device->options, options, length);
@@ -139,6 +145,7 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match) 
		buf = NULL;



	spin_lock_init(&port->lock);

	if (!port->uartclk)

		port->uartclk = BASE_BAUD * 16;

	if (port->mapbase)

		port->membase = earlycon_map(port->mapbase, 64);