Commit 3679389b authored by Robert Jarzmik's avatar Robert Jarzmik Committed by Russell King
Browse files

[ARM] 5031/1: Indentation correction in cpu-pxa.c. 



These indentation corrections prepare the pxa27x support.

Signed-off-by: default avatarRobert Jarzmik <rjarzmik@free.fr>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent ebdf982a

arch/arm/mach-pxa/cpu-pxa.c

+51 −47
Original line number Diff line number Diff line
@@ -72,13 +72,13 @@ typedef struct { 
/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */

static pxa_freqs_t pxa255_run_freqs[] =

{

    /* CPU   MEMBUS  CCCR  DIV2*/

    { 99500,  99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50,  SDRAM=50 */

    {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66,  SDRAM=66 */

    {199100,  99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99,  SDRAM=99 */

    {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */

    {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */

    {398100,  99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */

	/* CPU   MEMBUS  CCCR  DIV2		   run  turbo PXbus SDRAM */

	{ 99500,  99500, 0x121, 1},		/*  99,   99,   50,   50  */

	{132700, 132700, 0x123, 1},		/* 133,  133,   66,   66  */

	{199100,  99500, 0x141, 0},		/* 199,  199,   99,   99  */

	{265400, 132700, 0x143, 1},		/* 265,  265,  133,   66  */

	{331800, 165900, 0x145, 1},		/* 331,  331,  166,   83  */

	{398100,  99500, 0x161, 0},		/* 398,  398,  196,   99  */

	{0,}

};

#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
@@ -88,17 +88,18 @@ static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1]; 
/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */

static pxa_freqs_t pxa255_turbo_freqs[] =

{

    /* CPU   MEMBUS  CCCR  DIV2*/

    { 99500, 99500,  0x121, 1}, /* run=99,  turbo= 99, PXbus=50, SDRAM=50 */

    {199100, 99500,  0x221, 0}, /* run=99,  turbo=199, PXbus=50, SDRAM=99 */

    {298500, 99500,  0x321, 0}, /* run=99,  turbo=287, PXbus=50, SDRAM=99 */

    {298600, 99500,  0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */

    {398100, 99500,  0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */

	/* CPU   MEMBUS  CCCR  DIV2		   run  turbo PXbus SDRAM */

	{ 99500, 99500,  0x121, 1}, 		/*  99,   99,   50,   50  */

	{199100, 99500,  0x221, 0},		/*  99,  199,   50,   99  */

	{298500, 99500,  0x321, 0},		/*  99,  287,   50,   99  */

	{298600, 99500,  0x1c1, 0},		/* 199,  287,   99,   99  */

	{398100, 99500,  0x241, 0},		/* 199,  398,   99,   99  */

	{0,}

};

#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)



static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];

static struct cpufreq_frequency_table

	pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];



extern unsigned get_clk_frequency_khz(int info);
@@ -164,7 +165,8 @@ static int pxa_set_target(struct cpufreq_policy *policy, 
	freqs.cpu = policy->cpu;



	if (freq_debug)

		pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",

		pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, "

			 "(SDRAM %d Mhz)\n",

			 freqs.new / 1000, (pxa_freq_settings[idx].div2) ?

			 (pxa_freq_settings[idx].membus / 2000) :

			 (pxa_freq_settings[idx].membus / 1000));
@@ -177,11 +179,12 @@ static int pxa_set_target(struct cpufreq_policy *policy, 
	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);



	/* Calculate the next MDREFR.  If we're slowing down the SDRAM clock

	 * we need to preset the smaller DRI before the change.  If we're speeding

	 * up we need to set the larger DRI value after the change.

	 * we need to preset the smaller DRI before the change.	 If we're

	 * speeding up we need to set the larger DRI value after the change.

	 */

	preset_mdrefr = postset_mdrefr = MDREFR;

	if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {

	if ((MDREFR & MDREFR_DRI_MASK) >

	    MDREFR_DRI(pxa_freq_settings[idx].membus)) {

		preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |

			MDREFR_DRI(pxa_freq_settings[idx].membus);

	}
@@ -260,7 +263,8 @@ static int pxa_cpufreq_init(struct cpufreq_policy *policy) 
	pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;

	/* Generate the turbo cpufreq_frequency_table struct */

	for (i = 0; i < NUM_TURBO_FREQS; i++) {

		pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;

		pxa255_turbo_freq_table[i].frequency =

			pxa255_turbo_freqs[i].khz;

		pxa255_turbo_freq_table[i].index = i;

	}

	pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;