Commit 3647c53b authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo: add RAMFC info to nvkm_chan_func 



- adds support for specifying SUBDEVICE_ID for channel
- rounds non-power-of-two GPFIFO sizes down, rather than up

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent fbe9f433

drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h

+7 −0
Original line number Diff line number Diff line
@@ -28,6 +28,13 @@ struct nvkm_chan { 
		u32 base;

	} userd;



	u32 ramfc_offset;

	struct nvkm_gpuobj *ramfc;

	struct nvkm_gpuobj *cache;

	struct nvkm_gpuobj *eng;

	struct nvkm_gpuobj *pgd;

	struct nvkm_ramht *ramht;



	spinlock_t lock;

	atomic_t blocked;

	atomic_t errored;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c

+16 −6
Original line number Diff line number Diff line
@@ -29,8 +29,8 @@ 
#include "priv.h"



#include <core/client.h>

#include <core/gpuobj.h>

#include <core/oproxy.h>

#include <core/ramht.h>

#include <subdev/mmu.h>

#include <engine/dma.h>
@@ -434,6 +434,15 @@ nvkm_chan_del(struct nvkm_chan **pchan) 
	if (!chan)

		return;



	if (chan->func->ramfc->clear)

		chan->func->ramfc->clear(chan);



	nvkm_ramht_del(&chan->ramht);

	nvkm_gpuobj_del(&chan->pgd);

	nvkm_gpuobj_del(&chan->eng);

	nvkm_gpuobj_del(&chan->cache);

	nvkm_gpuobj_del(&chan->ramfc);



	nvkm_memory_unref(&chan->userd.mem);



	if (chan->cgrp) {
@@ -618,17 +627,18 @@ nvkm_fifo_chan_ctor(const struct nvkm_fifo_chan_func *fn, 
		chan->vmm = nvkm_vmm_ref(vmm);

	}



	/* allocate push buffer ctxdma instance */

	if (push) {

	/* Allocate HW ctxdma for push buffer. */

	if (func->ramfc->ctxdma) {

		dmaobj = nvkm_dmaobj_search(client, push);

		if (IS_ERR(dmaobj))

			return PTR_ERR(dmaobj);



		ret = nvkm_object_bind(&dmaobj->object, chan->inst, -16,

				       &chan->push);

		if (ret)

		ret = nvkm_object_bind(&dmaobj->object, chan->inst, -16, &chan->push);

		if (ret) {

			RUNL_DEBUG(runl, "bind %d", ret);

			return ret;

		}

	}



	/* Allocate channel ID. */

	chan->id = nvkm_chid_get(runl->chid, chan);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h

+15 −0
Original line number Diff line number Diff line
@@ -29,6 +29,21 @@ struct nvkm_chan_func { 
		void (*clear)(struct nvkm_chan *);

	} *userd;



	const struct nvkm_chan_func_ramfc {

		const struct nvkm_ramfc_layout {

			unsigned bits:6;

			unsigned ctxs:5;

			unsigned ctxp:8;

			unsigned regs:5;

			unsigned regp;

		} *layout;

		int (*write)(struct nvkm_chan *, u64 offset, u64 length, u32 devm, bool priv);

		void (*clear)(struct nvkm_chan *);

		bool ctxdma;

		u32 devm;

		bool priv;

	} *ramfc;



	void (*bind)(struct nvkm_chan *);

	void (*unbind)(struct nvkm_chan *);

	void (*start)(struct nvkm_chan *);

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c

+1 −25
Original line number Diff line number Diff line
@@ -182,7 +182,6 @@ g84_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vmm, u64 push, 
		   const struct nvkm_oclass *oclass,

		   struct nv50_fifo_chan *chan)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	int ret;



	if (!vmm)
@@ -206,28 +205,5 @@ g84_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vmm, u64 push, 
				  BIT(G84_FIFO_ENGN_DMA),

				  0, 0xc00000, 0x2000, oclass, &chan->base);

	chan->fifo = fifo;

	if (ret)

	return ret;



	ret = nvkm_gpuobj_new(device, 0x0200, 0, true, chan->base.inst,

			      &chan->eng);

	if (ret)

		return ret;



	ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst,

			      &chan->pgd);

	if (ret)

		return ret;



	ret = nvkm_gpuobj_new(device, 0x1000, 0x400, true, chan->base.inst,

			      &chan->cache);

	if (ret)

		return ret;



	ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, chan->base.inst,

			      &chan->ramfc);

	if (ret)

		return ret;



	return nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);

}

drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c

+1 −25
Original line number Diff line number Diff line
@@ -187,11 +187,6 @@ void * 
nv50_fifo_chan_dtor(struct nvkm_fifo_chan *base)

{

	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);

	nvkm_ramht_del(&chan->ramht);

	nvkm_gpuobj_del(&chan->pgd);

	nvkm_gpuobj_del(&chan->eng);

	nvkm_gpuobj_del(&chan->cache);

	nvkm_gpuobj_del(&chan->ramfc);

	return chan;

}
@@ -211,7 +206,6 @@ nv50_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vmm, u64 push, 
		    const struct nvkm_oclass *oclass,

		    struct nv50_fifo_chan *chan)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	int ret;



	if (!vmm)
@@ -225,23 +219,5 @@ nv50_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vmm, u64 push, 
				  BIT(NV50_FIFO_ENGN_DMA),

				  0, 0xc00000, 0x2000, oclass, &chan->base);

	chan->fifo = fifo;

	if (ret)

	return ret;



	ret = nvkm_gpuobj_new(device, 0x0200, 0x1000, true, chan->base.inst,

			      &chan->ramfc);

	if (ret)

		return ret;



	ret = nvkm_gpuobj_new(device, 0x1200, 0, true, chan->base.inst,

			      &chan->eng);

	if (ret)

		return ret;



	ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst,

			      &chan->pgd);

	if (ret)

		return ret;



	return nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);

}