Loading arch/arm/plat-mxc/gpio.c +9 −11 Original line number Diff line number Diff line Loading @@ -154,24 +154,22 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) __raw_writel(val | (edge << (bit << 1)), reg); } /* handle n interrupts in one status register */ /* handle 32 interrupts in one status register */ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) { u32 gpio_irq_no; u32 gpio_irq_no_base = port->virtual_irq_start; gpio_irq_no = port->virtual_irq_start; for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) { u32 gpio = irq_to_gpio(gpio_irq_no); while (irq_stat != 0) { int irqoffset = fls(irq_stat) - 1; if ((irq_stat & 1) == 0) continue; BUG_ON(!(irq_desc[gpio_irq_no_base + irqoffset].handle_irq)); BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); if (port->both_edges & (1 << irqoffset)) mxc_flip_edge(port, irqoffset); if (port->both_edges & (1 << (gpio & 31))) mxc_flip_edge(port, gpio); generic_handle_irq(gpio_irq_no_base + irqoffset); generic_handle_irq(gpio_irq_no); irq_stat &= ~(1 << irqoffset); } } Loading Loading
arch/arm/plat-mxc/gpio.c +9 −11 Original line number Diff line number Diff line Loading @@ -154,24 +154,22 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) __raw_writel(val | (edge << (bit << 1)), reg); } /* handle n interrupts in one status register */ /* handle 32 interrupts in one status register */ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) { u32 gpio_irq_no; u32 gpio_irq_no_base = port->virtual_irq_start; gpio_irq_no = port->virtual_irq_start; for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) { u32 gpio = irq_to_gpio(gpio_irq_no); while (irq_stat != 0) { int irqoffset = fls(irq_stat) - 1; if ((irq_stat & 1) == 0) continue; BUG_ON(!(irq_desc[gpio_irq_no_base + irqoffset].handle_irq)); BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); if (port->both_edges & (1 << irqoffset)) mxc_flip_edge(port, irqoffset); if (port->both_edges & (1 << (gpio & 31))) mxc_flip_edge(port, gpio); generic_handle_irq(gpio_irq_no_base + irqoffset); generic_handle_irq(gpio_irq_no); irq_stat &= ~(1 << irqoffset); } } Loading