Commit 360bd6c6 authored by Helge Deller's avatar Helge Deller
Browse files

parisc: Use constants to encode the space registers like SR_KERNEL 



Use the provided space register constants instead of hardcoded values.

Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 5613a930

arch/parisc/include/asm/cache.h

+4 −7
Original line number Diff line number Diff line
@@ -39,16 +39,13 @@ extern int icache_stride; 
extern struct pdc_cache_info cache_info;

void parisc_setup_cache_timing(void);



#define pdtlb(addr)	asm volatile("pdtlb 0(%%sr1,%0)" \

#define pdtlb(sr, addr)	asm volatile("pdtlb 0(%%sr%0,%1)" \

			ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

			: : "r" (addr) : "memory")

#define pitlb(addr)	asm volatile("pitlb 0(%%sr1,%0)" \

			: : "i"(sr), "r" (addr) : "memory")

#define pitlb(sr, addr)	asm volatile("pitlb 0(%%sr%0,%1)" \

			ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

			ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \

			: : "r" (addr) : "memory")

#define pdtlb_kernel(addr)  asm volatile("pdtlb 0(%0)"   \

			ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

			: : "r" (addr) : "memory")

			: : "i"(sr), "r" (addr) : "memory")



#define asm_io_fdc(addr) asm volatile("fdc %%r0(%0)" \

			ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \

arch/parisc/include/asm/mmu_context.h

+1 −1
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ static inline unsigned long __space_to_prot(mm_context_t context) 


static inline void load_context(mm_context_t context)

{

	mtsp(context.space_id, 3);

	mtsp(context.space_id, SR_USER);

	mtctl(__space_to_prot(context), 8);

}

arch/parisc/include/asm/pgtable.h

+3 −3
Original line number Diff line number Diff line
@@ -70,9 +70,9 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr) 
	unsigned long flags;



	purge_tlb_start(flags);

	mtsp(mm->context.space_id, 1);

	pdtlb(addr);

	pitlb(addr);

	mtsp(mm->context.space_id, SR_TEMP1);

	pdtlb(SR_TEMP1, addr);

	pitlb(SR_TEMP1, addr);

	purge_tlb_end(flags);

}

arch/parisc/include/asm/special_insns.h

+2 −2
Original line number Diff line number Diff line
@@ -55,8 +55,8 @@ static inline void set_eiem(unsigned long val) 
#define mfsp(reg)	({		\

	unsigned long cr;		\

	__asm__ __volatile__(		\

		"mfsp " #reg ",%0" :	\

		 "=r" (cr)		\

		"mfsp %%sr%1,%0"	\

		: "=r" (cr) : "i"(reg)	\

	);				\

	cr;				\

})

arch/parisc/kernel/cache.c

+4 −4
Original line number Diff line number Diff line
@@ -457,7 +457,7 @@ void flush_kernel_dcache_page_addr(void *addr) 


	flush_kernel_dcache_page_asm(addr);

	purge_tlb_start(flags);

	pdtlb_kernel(addr);

	pdtlb(SR_KERNEL, addr);

	purge_tlb_end(flags);

}

EXPORT_SYMBOL(flush_kernel_dcache_page_addr);
@@ -496,9 +496,9 @@ int __flush_tlb_range(unsigned long sid, unsigned long start, 
	   but cause a purge request to be broadcast to other TLBs.  */

	while (start < end) {

		purge_tlb_start(flags);

		mtsp(sid, 1);

		pdtlb(start);

		pitlb(start);

		mtsp(sid, SR_TEMP1);

		pdtlb(SR_TEMP1, start);

		pitlb(SR_TEMP1, start);

		purge_tlb_end(flags);

		start += PAGE_SIZE;

	}