Loading drivers/gpu/drm/nouveau/core/subdev/pwr/base.c +5 −5 Original line number Diff line number Diff line Loading @@ -32,6 +32,11 @@ nouveau_pwr_send(struct nouveau_pwr *ppwr, u32 reply[2], struct nouveau_subdev *subdev = nv_subdev(ppwr); u32 addr; /* wait for a free slot in the fifo */ addr = nv_rd32(ppwr, 0x10a4a0); if (!nv_wait_ne(ppwr, 0x10a4b0, 0xffffffff, addr ^ 8)) return -EBUSY; /* we currently only support a single process at a time waiting * on a synchronous reply, take the PPWR mutex and tell the * receive handler what we're waiting for Loading @@ -42,11 +47,6 @@ nouveau_pwr_send(struct nouveau_pwr *ppwr, u32 reply[2], ppwr->recv.process = process; } /* wait for a free slot in the fifo */ addr = nv_rd32(ppwr, 0x10a4a0); if (!nv_wait_ne(ppwr, 0x10a4b0, 0xffffffff, addr ^ 8)) return -EBUSY; /* acquire data segment access */ do { nv_wr32(ppwr, 0x10a580, 0x00000001); Loading Loading
drivers/gpu/drm/nouveau/core/subdev/pwr/base.c +5 −5 Original line number Diff line number Diff line Loading @@ -32,6 +32,11 @@ nouveau_pwr_send(struct nouveau_pwr *ppwr, u32 reply[2], struct nouveau_subdev *subdev = nv_subdev(ppwr); u32 addr; /* wait for a free slot in the fifo */ addr = nv_rd32(ppwr, 0x10a4a0); if (!nv_wait_ne(ppwr, 0x10a4b0, 0xffffffff, addr ^ 8)) return -EBUSY; /* we currently only support a single process at a time waiting * on a synchronous reply, take the PPWR mutex and tell the * receive handler what we're waiting for Loading @@ -42,11 +47,6 @@ nouveau_pwr_send(struct nouveau_pwr *ppwr, u32 reply[2], ppwr->recv.process = process; } /* wait for a free slot in the fifo */ addr = nv_rd32(ppwr, 0x10a4a0); if (!nv_wait_ne(ppwr, 0x10a4b0, 0xffffffff, addr ^ 8)) return -EBUSY; /* acquire data segment access */ do { nv_wr32(ppwr, 0x10a580, 0x00000001); Loading