Commit 3586b026 authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Thierry Reding
Browse files

pwm: sifive: Enable clk only after period check in .apply() 



For the period check and the initial calculations of register values there
is no hardware access needed. So delay enabling the clk a bit to simplify
the code flow a bit.

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: default avatarEmil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 0f02f491

drivers/pwm/pwm-sifive.c

+8 −10
Original line number Diff line number Diff line
@@ -139,12 +139,6 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
	if (state->polarity != PWM_POLARITY_INVERSED)

		return -EINVAL;



	ret = clk_enable(ddata->clk);

	if (ret) {

		dev_err(ddata->chip.dev, "Enable clk failed\n");

		return ret;

	}



	cur_state = pwm->state;

	enabled = cur_state.enabled;
@@ -167,14 +161,19 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
	if (state->period != ddata->approx_period) {

		if (ddata->user_count != 1) {

			mutex_unlock(&ddata->lock);

			ret = -EBUSY;

			goto exit;

			return -EBUSY;

		}

		ddata->approx_period = state->period;

		pwm_sifive_update_clock(ddata, clk_get_rate(ddata->clk));

	}

	mutex_unlock(&ddata->lock);



	ret = clk_enable(ddata->clk);

	if (ret) {

		dev_err(ddata->chip.dev, "Enable clk failed\n");

		return ret;

	}



	writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm));



	if (state->enabled != enabled) {
@@ -186,9 +185,8 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
		}

	}



exit:

	clk_disable(ddata->clk);

	return ret;

	return 0;

}



static const struct pwm_ops pwm_sifive_ops = {