Commit 353b18dc authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Bjorn Andersson
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clk: qcom: gpucc-msm8998: switch to parent_hws 



Switch gfx3d_clk_src parents to use parent_hws instead of parent_data,
to clarify that these clocks are internal.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Updated commit message]
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-16-dmitry.baryshkov@linaro.org
parent 18aa0dc2

drivers/clk/qcom/gpucc-msm8998.c

+4 −4
Original line number Diff line number Diff line
@@ -106,9 +106,9 @@ static const struct parent_map gpu_xo_gpupll0_map[] = { 
	{ P_GPUPLL0_OUT_EVEN, 1 },

};



static const struct clk_parent_data gpu_xo_gpupll0[] = {

	{ .hw = &gpucc_cxo_clk.clkr.hw },

	{ .hw = &gpupll0_out_even.clkr.hw },

static const struct clk_hw *gpu_xo_gpupll0[] = {

	&gpucc_cxo_clk.clkr.hw,

	&gpupll0_out_even.clkr.hw,

};



static const struct freq_tbl ftbl_rbcpr_clk_src[] = {
@@ -142,7 +142,7 @@ static struct clk_rcg2 gfx3d_clk_src = { 
	.freq_tbl = ftbl_gfx3d_clk_src,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gfx3d_clk_src",

		.parent_data = gpu_xo_gpupll0,

		.parent_hws = gpu_xo_gpupll0,

		.num_parents = ARRAY_SIZE(gpu_xo_gpupll0),

		.ops = &clk_rcg2_ops,

		.flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,