Commit 3532e75d authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio
Browse files

drm/i915/uc: perma-pin firmwares 



Now that each FW has its own reserved area, we can keep them always
pinned and skip the pin/unpin dance on reset. This will make things
easier for the 2-step HuC authentication, which requires the FW to be
pinned in GGTT after the xfer is completed.
Since the vma is now valid for a long time and not just for the quick
pin-load-unpin dance, the name "dummy" is no longer appropriare and has
been replaced with vma_res. All the functions have also been updated to
operate on vma_res for consistency.
Given that we pin the vma behind the allocator's back (which is ok
because we do the pinning in an area that was previously reserved for
thus purpose), we do need to explicitly re-pin on resume because the
automated helper won't cover us.

v2: better comments and commit message, s/dummy/vma_res/

Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-2-daniele.ceraolospurio@intel.com
parent 9ff17e6b

drivers/gpu/drm/i915/gt/intel_ggtt.c

+3 −0
Original line number Diff line number Diff line
@@ -1326,6 +1326,9 @@ void i915_ggtt_resume(struct i915_ggtt *ggtt) 
		ggtt->vm.scratch_range(&ggtt->vm, ggtt->error_capture.start,

				       ggtt->error_capture.size);



	list_for_each_entry(gt, &ggtt->gt_list, ggtt_link)

		intel_uc_resume_mappings(&gt->uc);



	ggtt->invalidate(ggtt);



	if (flush)

drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c

+6 −1
Original line number Diff line number Diff line
@@ -90,7 +90,12 @@ void intel_gsc_uc_init_early(struct intel_gsc_uc *gsc) 
{

	struct intel_gt *gt = gsc_uc_to_gt(gsc);



	intel_uc_fw_init_early(&gsc->fw, INTEL_UC_FW_TYPE_GSC);

	/*

	 * GSC FW needs to be copied to a dedicated memory allocations for

	 * loading (see gsc->local), so we don't need to GGTT map the FW image

	 * itself into GGTT.

	 */

	intel_uc_fw_init_early(&gsc->fw, INTEL_UC_FW_TYPE_GSC, false);

	INIT_WORK(&gsc->work, gsc_work);



	/* we can arrive here from i915_driver_early_probe for primary

drivers/gpu/drm/i915/gt/uc/intel_guc.c

+1 −1
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ void intel_guc_init_early(struct intel_guc *guc) 
	struct intel_gt *gt = guc_to_gt(guc);

	struct drm_i915_private *i915 = gt->i915;



	intel_uc_fw_init_early(&guc->fw, INTEL_UC_FW_TYPE_GUC);

	intel_uc_fw_init_early(&guc->fw, INTEL_UC_FW_TYPE_GUC, true);

	intel_guc_ct_init_early(&guc->ct);

	intel_guc_log_init_early(&guc->log);

	intel_guc_submission_init_early(guc);

drivers/gpu/drm/i915/gt/uc/intel_huc.c

+1 −1
Original line number Diff line number Diff line
@@ -276,7 +276,7 @@ void intel_huc_init_early(struct intel_huc *huc) 
	struct drm_i915_private *i915 = huc_to_gt(huc)->i915;

	struct intel_gt *gt = huc_to_gt(huc);



	intel_uc_fw_init_early(&huc->fw, INTEL_UC_FW_TYPE_HUC);

	intel_uc_fw_init_early(&huc->fw, INTEL_UC_FW_TYPE_HUC, true);



	/*

	 * we always init the fence as already completed, even if HuC is not

drivers/gpu/drm/i915/gt/uc/intel_uc.c

+8 −0
Original line number Diff line number Diff line
@@ -700,6 +700,12 @@ void intel_uc_suspend(struct intel_uc *uc) 
	}

}



static void __uc_resume_mappings(struct intel_uc *uc)

{

	intel_uc_fw_resume_mapping(&uc->guc.fw);

	intel_uc_fw_resume_mapping(&uc->huc.fw);

}



static int __uc_resume(struct intel_uc *uc, bool enable_communication)

{

	struct intel_guc *guc = &uc->guc;
@@ -767,4 +773,6 @@ static const struct intel_uc_ops uc_ops_on = { 


	.init_hw = __uc_init_hw,

	.fini_hw = __uc_fini_hw,



	.resume_mappings = __uc_resume_mappings,

};