Commit 35118c4c authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/dsb: Extract intel_dsb_emit() 



Extract a small helper to emit a DSB intstruction. Should
become useful if/when we need to start emitting other
instructions besides register writes.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-7-ville.syrjala@linux.intel.com


Reviewed-by: default avatarAnimesh Manna <animesh.manna@intel.com>
parent aab8fbc9

drivers/gpu/drm/i915/display/intel_dsb.c

+20 −10
Original line number Diff line number Diff line
@@ -86,6 +86,22 @@ static bool is_dsb_busy(struct drm_i915_private *i915, enum pipe pipe, 
	return intel_de_read(i915, DSB_CTRL(pipe, id)) & DSB_STATUS_BUSY;

}



static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)

{

	u32 *buf = dsb->cmd_buf;



	if (!assert_dsb_has_room(dsb))

		return;



	/* Every instruction should be 8 byte aligned. */

	dsb->free_pos = ALIGN(dsb->free_pos, 2);



	dsb->ins_start_offset = dsb->free_pos;



	buf[dsb->free_pos++] = ldw;

	buf[dsb->free_pos++] = udw;

}



/**

 * intel_dsb_indexed_reg_write() -Write to the DSB context for auto

 * increment register.
@@ -169,19 +185,13 @@ void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, 
void intel_dsb_reg_write(struct intel_dsb *dsb,

			 i915_reg_t reg, u32 val)

{

	u32 *buf = dsb->cmd_buf;



	if (!assert_dsb_has_room(dsb))

		return;



	/* Every instruction should be 8 byte aligned. */

	dsb->free_pos = ALIGN(dsb->free_pos, 2);



	dsb->ins_start_offset = dsb->free_pos;

	buf[dsb->free_pos++] = val;

	buf[dsb->free_pos++] = (DSB_OPCODE_MMIO_WRITE  << DSB_OPCODE_SHIFT) |

	intel_dsb_emit(dsb, val,

		       (DSB_OPCODE_MMIO_WRITE << DSB_OPCODE_SHIFT) |

		       (DSB_BYTE_EN << DSB_BYTE_EN_SHIFT) |

			       i915_mmio_reg_offset(reg);

		       i915_mmio_reg_offset(reg));

}



/**