Commit 34f3b165 authored by Sankeerth Billakanti's avatar Sankeerth Billakanti Committed by Rob Clark
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drm/msm/dp: Enable downspread for supported DP sinks 



The sc7280 eDP sink that supports downspread will fail link training
if source does not enable SSC / downspread. This change will set the
downspread bit in the DP sink if supported and indicate SSC support
to the DP PHY driver.

Signed-off-by: default avatarSankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1635839325-401-5-git-send-email-quic_sbillaka@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 447a39f4

drivers/gpu/drm/msm/dp/dp_ctrl.c

+11 −1
Original line number Diff line number Diff line
@@ -1228,7 +1228,9 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, 
			int *training_step)

{

	int ret = 0;

	const u8 *dpcd = ctrl->panel->dpcd;

	u8 encoding = DP_SET_ANSI_8B10B;

	u8 ssc;

	struct dp_link_info link_info = {0};



	dp_ctrl_config_ctrl(ctrl);
@@ -1238,6 +1240,12 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, 
	link_info.capabilities = DP_LINK_CAP_ENHANCED_FRAMING;



	dp_aux_link_configure(ctrl->aux, &link_info);



	if (drm_dp_max_downspread(dpcd)) {

		ssc = DP_SPREAD_AMP_0_5;

		drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, &ssc, 1);

	}



	drm_dp_dpcd_write(ctrl->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,

				&encoding, 1);
@@ -1312,9 +1320,11 @@ static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) 
	struct dp_io *dp_io = &ctrl->parser->io;

	struct phy *phy = dp_io->phy;

	struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp;

	const u8 *dpcd = ctrl->panel->dpcd;



	opts_dp->lanes = ctrl->link->link_params.num_lanes;

	opts_dp->link_rate = ctrl->link->link_params.rate / 100;

	opts_dp->ssc = drm_dp_max_downspread(dpcd);

	dp_ctrl_set_clock_rate(ctrl, DP_CTRL_PM, "ctrl_link",

					ctrl->link->link_params.rate * 1000);
@@ -1406,7 +1416,7 @@ void dp_ctrl_host_deinit(struct dp_ctrl *dp_ctrl) 


static bool dp_ctrl_use_fixed_nvid(struct dp_ctrl_private *ctrl)

{

	u8 *dpcd = ctrl->panel->dpcd;

	const u8 *dpcd = ctrl->panel->dpcd;



	/*

	 * For better interop experience, used a fixed NVID=0x8000