Commit 34e5c0cd authored by Emanuele Ghidoli's avatar Emanuele Ghidoli Committed by Shawn Guo
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arm64: dts: colibri-imx8x: fix iris pinctrl configuration 



Remove GPIO3_IO10 from Iris carrier board pinctrl configuration,
this is already defined in the SOM dtsi since this is a
standard SOM functionality (wake-up button).

Duplicating it leads to the following error message
imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_QSPI0A_DATA1 already requested

Fixes: aefb5e2d ("arm64: dts: colibri-imx8x: Add iris carrier board")
Signed-off-by: default avatarEmanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: default avatarAndrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: default avatarFrancesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 25acffb0

arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi

+1 −2
Original line number Diff line number Diff line
@@ -48,8 +48,7 @@ 
			   <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28		0x20>,		/* SODIMM 101 */

			   <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27		0x20>,		/* SODIMM  97 */

			   <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03	0x06000020>,	/* SODIMM  85 */

			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20>,		/* SODIMM  79 */

			   <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10	0x06700041>;	/* SODIMM  45 */

			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20>;		/* SODIMM  79 */

	};



	pinctrl_uart1_forceoff: uart1forceoffgrp {