!7227 arm64: arm_pmuv3: Correctly extract and check the PMUVer

 */

	.macro	reset_pmuserenr_el0, tmpreg

	mrs	\tmpreg, id_aa64dfr0_el1

	sbfx	\tmpreg, \tmpreg, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4

	cmp	\tmpreg, #1			// Skip if no PMU present

	b.lt	9000f

	ubfx	\tmpreg, \tmpreg, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4

	cmp	\tmpreg, #ID_AA64DFR0_EL1_PMUVer_NI

	ccmp	\tmpreg, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF, #4, ne

	b.eq	9000f				// Skip if no PMU present or IMP_DEF

	msr	pmuserenr_el0, xzr		// Disable PMU access from EL0

9000:

	.endm

.macro __init_el2_debug

	mrs	x1, id_aa64dfr0_el1

	sbfx	x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4

	cmp	x0, #1

	b.lt	.Lskip_pmu_\@			// Skip if no PMU present

	ubfx	x0, x1, #ID_AA64DFR0_EL1_PMUVer_SHIFT, #4

	cmp	x0, #ID_AA64DFR0_EL1_PMUVer_NI

	ccmp	x0, #ID_AA64DFR0_EL1_PMUVer_IMP_DEF, #4, ne

	b.eq	.Lskip_pmu_\@			// Skip if no PMU present or IMP_DEF

	mrs	x0, pmcr_el0			// Disable debug access traps

	ubfx	x0, x0, #11, #5			// to EL2 and allow access to

.Lskip_pmu_\@:

	csel	x2, xzr, x0, lt			// all PMU counters from EL1

	csel	x2, xzr, x0, eq			// all PMU counters from EL1

	/* Statistical profiling */

	ubfx	x0, x1, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4