Commit 346dda31 authored by Rob Herring's avatar Rob Herring
Browse files

dt-bindings: ufs: ti: Fix address properties handling 



The ti,j721e-ufs schema and example have a couple of problems related to
address properties. First, the default #size-cells and #address-cells
are 1 for examples, so they need to be overriden with a bus node.
Second, address translation for the child ufs node is broken because
'ranges', '#address-cells', and '#size-cells' are missing from the
schema.

Acked-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 3c9ab53f

Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml

+36 −21
Original line number Diff line number Diff line
@@ -25,6 +25,14 @@ properties: 
  power-domains:

    maxItems: 1



  "#address-cells":

    const: 2



  "#size-cells":

    const: 2



  ranges: true



required:

  - compatible

  - reg
@@ -44,19 +52,25 @@ examples: 
    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    ufs_wrapper: ufs-wrapper@4e80000 {

    bus {

        #address-cells = <2>;

        #size-cells = <2>;



        ufs-wrapper@4e80000 {

            compatible = "ti,j721e-ufs";

            reg = <0x0 0x4e80000 0x0 0x100>;

            power-domains = <&k3_pds 277>;

            clocks = <&k3_clks 277 1>;

            assigned-clocks = <&k3_clks 277 1>;

            assigned-clock-parents = <&k3_clks 277 4>;



            ranges = <0x0 0x0 0x0 0x4e80000 0x0 0x14000>;

            #address-cells = <2>;

            #size-cells = <2>;



       ufs@4e84000 {

            ufs@4000 {

                compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";

          reg = <0x0 0x4e84000 0x0 0x10000>;

                reg = <0x0 0x4000 0x0 0x10000>;

                interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

                freq-table-hz = <19200000 19200000>;

                power-domains = <&k3_pds 277>;
@@ -66,3 +80,4 @@ examples: 
                clock-names = "core_clk";

            };

        };

    };