Commit 3450bb5b authored by Maulik Shah's avatar Maulik Shah Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7280: Add RSC and PDC devices 



Add PDC interrupt controller along with apps RSC device.
Also add reserved memory for command_db.

Signed-off-by: default avatarMaulik Shah <mkshah@codeaurora.org>
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-6-git-send-email-rnayak@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 7a1f4e7f

arch/arm64/boot/dts/qcom/sc7280.dtsi

+44 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 


#include <dt-bindings/clock/qcom,gcc-sc7280.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>



/ {

	interrupt-parent = <&intc>;
@@ -30,6 +31,18 @@ 
		};

	};



	reserved-memory {

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;



		aop_cmd_db_mem: memory@80860000 {

			reg = <0x0 0x80860000 0x0 0x20000>;

			compatible = "qcom,cmd-db";

			no-map;

		};

	};



	cpus {

		#address-cells = <2>;

		#size-cells = <0>;
@@ -194,6 +207,19 @@ 
			};

		};



		pdc: interrupt-controller@b220000 {

			compatible = "qcom,sc7280-pdc", "qcom,pdc";

			reg = <0 0x0b220000 0 0x30000>;

			qcom,pdc-ranges = <0 480 40>, <40 140 14>, <54 263 1>,

					  <55 306 4>, <59 312 3>, <62 374 2>,

					  <64 434 2>, <66 438 3>, <69 86 1>,

					  <70 520 54>, <124 609 31>, <155 63 1>,

					  <156 716 12>;

			#interrupt-cells = <2>;

			interrupt-parent = <&intc>;

			interrupt-controller;

		};



		tlmm: pinctrl@f100000 {

			compatible = "qcom,sc7280-pinctrl";

			reg = <0 0x0f100000 0 0x300000>;
@@ -203,6 +229,7 @@ 
			interrupt-controller;

			#interrupt-cells = <2>;

			gpio-ranges = <&tlmm 0 0 175>;

			wakeup-parent = <&pdc>;



			qup_uart5_default: qup-uart5-default {

				pins = "gpio46", "gpio47";
@@ -287,6 +314,23 @@ 
				status = "disabled";

			};

		};



		apps_rsc: rsc@18200000 {

			compatible = "qcom,rpmh-rsc";

			reg = <0 0x18200000 0 0x10000>,

			      <0 0x18210000 0 0x10000>,

			      <0 0x18220000 0 0x10000>;

			reg-names = "drv-0", "drv-1", "drv-2";

			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

			qcom,tcs-offset = <0xd00>;

			qcom,drv-id = <2>;

			qcom,tcs-config = <ACTIVE_TCS  2>,

					  <SLEEP_TCS   3>,

					  <WAKE_TCS    3>,

					  <CONTROL_TCS 1>;

		};

	};



	timer {