Commit 3410fbcd authored by Maor Gottlieb's avatar Maor Gottlieb Committed by Saeed Mahameed
Browse files

{net, RDMA}/mlx5: Fix override of log_max_qp by other device 



mlx5_core_dev holds pointer to static profile, hence when the
log_max_qp of the profile is override by some device, then it
effect all other mlx5 devices that share the same profile.
Fix it by having a profile instance for every mlx5 device.

Fixes: 883371c4 ("net/mlx5: Check FW limitations on log_max_qp before setting it")
Signed-off-by: default avatarMaor Gottlieb <maorg@nvidia.com>
Reviewed-by: default avatarMark Bloch <mbloch@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent c9fd37a9

drivers/infiniband/hw/mlx5/mr.c

+2 −2
Original line number Diff line number Diff line
@@ -743,10 +743,10 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev) 
		ent->xlt = (1 << ent->order) * sizeof(struct mlx5_mtt) /

			   MLX5_IB_UMR_OCTOWORD;

		ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;

		if ((dev->mdev->profile->mask & MLX5_PROF_MASK_MR_CACHE) &&

		if ((dev->mdev->profile.mask & MLX5_PROF_MASK_MR_CACHE) &&

		    !dev->is_rep && mlx5_core_is_pf(dev->mdev) &&

		    mlx5_ib_can_load_pas_with_umr(dev, 0))

			ent->limit = dev->mdev->profile->mr_cache[i].limit;

			ent->limit = dev->mdev->profile.mr_cache[i].limit;

		else

			ent->limit = 0;

		spin_lock_irq(&ent->lock);

drivers/net/ethernet/mellanox/mlx5/core/main.c

+5 −6
Original line number Diff line number Diff line
@@ -503,7 +503,7 @@ static int handle_hca_cap_odp(struct mlx5_core_dev *dev, void *set_ctx) 


static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)

{

	struct mlx5_profile *prof = dev->profile;

	struct mlx5_profile *prof = &dev->profile;

	void *set_hca_cap;

	int err;
@@ -524,11 +524,11 @@ static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx) 
		 to_fw_pkey_sz(dev, 128));



	/* Check log_max_qp from HCA caps to set in current profile */

	if (MLX5_CAP_GEN_MAX(dev, log_max_qp) < profile[prof_sel].log_max_qp) {

	if (MLX5_CAP_GEN_MAX(dev, log_max_qp) < prof->log_max_qp) {

		mlx5_core_warn(dev, "log_max_qp value in current profile is %d, changing it to HCA capability limit (%d)\n",

			       profile[prof_sel].log_max_qp,

			       prof->log_max_qp,

			       MLX5_CAP_GEN_MAX(dev, log_max_qp));

		profile[prof_sel].log_max_qp = MLX5_CAP_GEN_MAX(dev, log_max_qp);

		prof->log_max_qp = MLX5_CAP_GEN_MAX(dev, log_max_qp);

	}

	if (prof->mask & MLX5_PROF_MASK_QP_SIZE)

		MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_qp,
@@ -1381,8 +1381,7 @@ int mlx5_mdev_init(struct mlx5_core_dev *dev, int profile_idx) 
	struct mlx5_priv *priv = &dev->priv;

	int err;



	dev->profile = &profile[profile_idx];



	memcpy(&dev->profile, &profile[profile_idx], sizeof(dev->profile));

	INIT_LIST_HEAD(&priv->ctx_list);

	spin_lock_init(&priv->ctx_lock);

	mutex_init(&dev->intf_state_mutex);

include/linux/mlx5/driver.h

+22 −22
Original line number Diff line number Diff line
@@ -703,6 +703,27 @@ struct mlx5_hv_vhca; 
#define MLX5_LOG_SW_ICM_BLOCK_SIZE(dev) (MLX5_CAP_DEV_MEM(dev, log_sw_icm_alloc_granularity))

#define MLX5_SW_ICM_BLOCK_SIZE(dev) (1 << MLX5_LOG_SW_ICM_BLOCK_SIZE(dev))



enum {

	MLX5_PROF_MASK_QP_SIZE		= (u64)1 << 0,

	MLX5_PROF_MASK_MR_CACHE		= (u64)1 << 1,

};



enum {

	MR_CACHE_LAST_STD_ENTRY = 20,

	MLX5_IMR_MTT_CACHE_ENTRY,

	MLX5_IMR_KSM_CACHE_ENTRY,

	MAX_MR_CACHE_ENTRIES

};



struct mlx5_profile {

	u64	mask;

	u8	log_max_qp;

	struct {

		int	size;

		int	limit;

	} mr_cache[MAX_MR_CACHE_ENTRIES];

};



struct mlx5_core_dev {

	struct device *device;

	enum mlx5_coredev_type coredev_type;
@@ -731,7 +752,7 @@ struct mlx5_core_dev { 
	struct mutex		intf_state_mutex;

	unsigned long		intf_state;

	struct mlx5_priv	priv;

	struct mlx5_profile	*profile;

	struct mlx5_profile	profile;

	u32			issi;

	struct mlx5e_resources  mlx5e_res;

	struct mlx5_dm          *dm;
@@ -1083,18 +1104,6 @@ static inline u8 mlx5_mkey_variant(u32 mkey) 
	return mkey & 0xff;

}



enum {

	MLX5_PROF_MASK_QP_SIZE		= (u64)1 << 0,

	MLX5_PROF_MASK_MR_CACHE		= (u64)1 << 1,

};



enum {

	MR_CACHE_LAST_STD_ENTRY = 20,

	MLX5_IMR_MTT_CACHE_ENTRY,

	MLX5_IMR_KSM_CACHE_ENTRY,

	MAX_MR_CACHE_ENTRIES

};



/* Async-atomic event notifier used by mlx5 core to forward FW

 * evetns recived from event queue to mlx5 consumers.

 * Optimise event queue dipatching.
@@ -1148,15 +1157,6 @@ int mlx5_rdma_rn_get_params(struct mlx5_core_dev *mdev, 
			    struct ib_device *device,

			    struct rdma_netdev_alloc_params *params);



struct mlx5_profile {

	u64	mask;

	u8	log_max_qp;

	struct {

		int	size;

		int	limit;

	} mr_cache[MAX_MR_CACHE_ENTRIES];

};



enum {

	MLX5_PCI_DEV_IS_VF		= 1 << 0,

};