Commit 340a84ce authored by Jerome Brunet's avatar Jerome Brunet Committed by Stephen Boyd
Browse files

clk: meson8b: fix clk81 register address 



During meson8b clock probe, clk81 register address is fixed twice.
First using the meson8b_clk_gates array, then by directly changing
meson8b_clk81 register.

As a result meson8b_clk81.reg = HHI_MPEG_CLK_CNTL + clk_base + clk_base.

Fixed by just removing the second fixup.

Fixes: e31a1900 ("meson: clk: Add support for clock gates")
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 88c9b70b

drivers/clk/meson/meson8b.c

+0 −1
Original line number Diff line number Diff line
@@ -607,7 +607,6 @@ static int meson8b_clkc_probe(struct platform_device *pdev) 
	/* Populate the base address for the MPEG clks */

	meson8b_mpeg_clk_sel.reg = clk_base + (u32)meson8b_mpeg_clk_sel.reg;

	meson8b_mpeg_clk_div.reg = clk_base + (u32)meson8b_mpeg_clk_div.reg;

	meson8b_clk81.reg = clk_base + (u32)meson8b_clk81.reg;



	/* Populate base address for gates */

	for (i = 0; i < ARRAY_SIZE(meson8b_clk_gates); i++)