Commit 33f7a32d authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'dsa-phylink_generic_validate' 



Russell King says:

====================
Trivial DSA conversions to phylink_generic_validate()

This series converts five DSA drivers to use phylink_generic_validate().
No feedback or testing reports were received from the CFT posting.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 83a18b8e 1f8d99de

drivers/net/dsa/bcm_sf2.c

+15 −39
Original line number Diff line number Diff line
@@ -709,49 +709,25 @@ static u32 bcm_sf2_sw_get_phy_flags(struct dsa_switch *ds, int port) 
		       PHY_BRCM_IDDQ_SUSPEND;

}



static void bcm_sf2_sw_validate(struct dsa_switch *ds, int port,

				unsigned long *supported,

				struct phylink_link_state *state)

static void bcm_sf2_sw_get_caps(struct dsa_switch *ds, int port,

				struct phylink_config *config)

{

	unsigned long *interfaces = config->supported_interfaces;

	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };



	if (!phy_interface_mode_is_rgmii(state->interface) &&

	    state->interface != PHY_INTERFACE_MODE_MII &&

	    state->interface != PHY_INTERFACE_MODE_REVMII &&

	    state->interface != PHY_INTERFACE_MODE_GMII &&

	    state->interface != PHY_INTERFACE_MODE_INTERNAL &&

	    state->interface != PHY_INTERFACE_MODE_MOCA) {

		linkmode_zero(supported);

		if (port != core_readl(priv, CORE_IMP0_PRT_ID))

			dev_err(ds->dev,

				"Unsupported interface: %d for port %d\n",

				state->interface, port);

		return;

	}



	/* Allow all the expected bits */

	phylink_set(mask, Autoneg);

	phylink_set_port_modes(mask);

	phylink_set(mask, Pause);

	phylink_set(mask, Asym_Pause);



	/* With the exclusion of MII and Reverse MII, we support Gigabit,

	 * including Half duplex

	 */

	if (state->interface != PHY_INTERFACE_MODE_MII &&

	    state->interface != PHY_INTERFACE_MODE_REVMII) {

		phylink_set(mask, 1000baseT_Full);

		phylink_set(mask, 1000baseT_Half);

	if (priv->int_phy_mask & BIT(port)) {

		__set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);

	} else if (priv->moca_port == port) {

		__set_bit(PHY_INTERFACE_MODE_MOCA, interfaces);

	} else {

		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);

		__set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);

		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);

		phy_interface_set_rgmii(interfaces);

	}



	phylink_set(mask, 10baseT_Half);

	phylink_set(mask, 10baseT_Full);

	phylink_set(mask, 100baseT_Half);

	phylink_set(mask, 100baseT_Full);



	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);

	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |

		MAC_10 | MAC_100 | MAC_1000;

}



static void bcm_sf2_sw_mac_config(struct dsa_switch *ds, int port,
@@ -1218,7 +1194,7 @@ static const struct dsa_switch_ops bcm_sf2_ops = { 
	.get_sset_count		= bcm_sf2_sw_get_sset_count,

	.get_ethtool_phy_stats	= b53_get_ethtool_phy_stats,

	.get_phy_flags		= bcm_sf2_sw_get_phy_flags,

	.phylink_validate	= bcm_sf2_sw_validate,

	.phylink_get_caps	= bcm_sf2_sw_get_caps,

	.phylink_mac_config	= bcm_sf2_sw_mac_config,

	.phylink_mac_link_down	= bcm_sf2_sw_mac_link_down,

	.phylink_mac_link_up	= bcm_sf2_sw_mac_link_up,

drivers/net/dsa/microchip/ksz8795.c

+12 −33
Original line number Diff line number Diff line
@@ -1461,27 +1461,22 @@ static int ksz8_setup(struct dsa_switch *ds) 
	return 0;

}



static void ksz8_validate(struct dsa_switch *ds, int port,

			  unsigned long *supported,

			  struct phylink_link_state *state)

static void ksz8_get_caps(struct dsa_switch *ds, int port,

			  struct phylink_config *config)

{

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };

	struct ksz_device *dev = ds->priv;



	if (port == dev->cpu_port) {

		if (state->interface != PHY_INTERFACE_MODE_RMII &&

		    state->interface != PHY_INTERFACE_MODE_MII &&

		    state->interface != PHY_INTERFACE_MODE_NA)

			goto unsupported;

		__set_bit(PHY_INTERFACE_MODE_RMII,

			  config->supported_interfaces);

		__set_bit(PHY_INTERFACE_MODE_MII,

			  config->supported_interfaces);

	} else {

		if (state->interface != PHY_INTERFACE_MODE_INTERNAL &&

		    state->interface != PHY_INTERFACE_MODE_NA)

			goto unsupported;

		__set_bit(PHY_INTERFACE_MODE_INTERNAL,

			  config->supported_interfaces);

	}



	/* Allow all the expected bits */

	phylink_set_port_modes(mask);

	phylink_set(mask, Autoneg);

	config->mac_capabilities = MAC_10 | MAC_100;



	/* Silicon Errata Sheet (DS80000830A):

	 * "Port 1 does not respond to received flow control PAUSE frames"
@@ -1489,27 +1484,11 @@ static void ksz8_validate(struct dsa_switch *ds, int port, 
	 * switches.

	 */

	if (!ksz_is_ksz88x3(dev) || port)

		phylink_set(mask, Pause);

		config->mac_capabilities |= MAC_SYM_PAUSE;



	/* Asym pause is not supported on KSZ8863 and KSZ8873 */

	if (!ksz_is_ksz88x3(dev))

		phylink_set(mask, Asym_Pause);



	/* 10M and 100M are only supported */

	phylink_set(mask, 10baseT_Half);

	phylink_set(mask, 10baseT_Full);

	phylink_set(mask, 100baseT_Half);

	phylink_set(mask, 100baseT_Full);



	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);



	return;



unsupported:

	linkmode_zero(supported);

	dev_err(ds->dev, "Unsupported interface: %s, port: %d\n",

		phy_modes(state->interface), port);

		config->mac_capabilities |= MAC_ASYM_PAUSE;

}



static const struct dsa_switch_ops ksz8_switch_ops = {
@@ -1518,7 +1497,7 @@ static const struct dsa_switch_ops ksz8_switch_ops = { 
	.setup			= ksz8_setup,

	.phy_read		= ksz_phy_read16,

	.phy_write		= ksz_phy_write16,

	.phylink_validate	= ksz8_validate,

	.phylink_get_caps	= ksz8_get_caps,

	.phylink_mac_link_down	= ksz_mac_link_down,

	.port_enable		= ksz_enable_port,

	.get_strings		= ksz8_get_strings,

drivers/net/dsa/qca/ar9331.c

+10 −35
Original line number Diff line number Diff line
@@ -499,52 +499,27 @@ static enum dsa_tag_protocol ar9331_sw_get_tag_protocol(struct dsa_switch *ds, 
	return DSA_TAG_PROTO_AR9331;

}



static void ar9331_sw_phylink_validate(struct dsa_switch *ds, int port,

				       unsigned long *supported,

				       struct phylink_link_state *state)

static void ar9331_sw_phylink_get_caps(struct dsa_switch *ds, int port,

				       struct phylink_config *config)

{

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };

	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |

		MAC_10 | MAC_100;



	switch (port) {

	case 0:

		if (state->interface != PHY_INTERFACE_MODE_GMII)

			goto unsupported;



		phylink_set(mask, 1000baseT_Full);

		phylink_set(mask, 1000baseT_Half);

		__set_bit(PHY_INTERFACE_MODE_GMII,

			  config->supported_interfaces);

		config->mac_capabilities |= MAC_1000;

		break;

	case 1:

	case 2:

	case 3:

	case 4:

	case 5:

		if (state->interface != PHY_INTERFACE_MODE_INTERNAL)

			goto unsupported;

		__set_bit(PHY_INTERFACE_MODE_INTERNAL,

			  config->supported_interfaces);

		break;

	default:

		linkmode_zero(supported);

		dev_err(ds->dev, "Unsupported port: %i\n", port);

		return;

	}



	phylink_set_port_modes(mask);

	phylink_set(mask, Pause);

	phylink_set(mask, Asym_Pause);



	phylink_set(mask, 10baseT_Half);

	phylink_set(mask, 10baseT_Full);

	phylink_set(mask, 100baseT_Half);

	phylink_set(mask, 100baseT_Full);



	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);



	return;



unsupported:

	linkmode_zero(supported);

	dev_err(ds->dev, "Unsupported interface: %d, port: %d\n",

		state->interface, port);

}



static void ar9331_sw_phylink_mac_config(struct dsa_switch *ds, int port,
@@ -697,7 +672,7 @@ static const struct dsa_switch_ops ar9331_sw_ops = { 
	.get_tag_protocol	= ar9331_sw_get_tag_protocol,

	.setup			= ar9331_sw_setup,

	.port_disable		= ar9331_sw_port_disable,

	.phylink_validate	= ar9331_sw_phylink_validate,

	.phylink_get_caps	= ar9331_sw_phylink_get_caps,

	.phylink_mac_config	= ar9331_sw_phylink_mac_config,

	.phylink_mac_link_down	= ar9331_sw_phylink_mac_link_down,

	.phylink_mac_link_up	= ar9331_sw_phylink_mac_link_up,

drivers/net/dsa/qca8k.c

+19 −47
Original line number Diff line number Diff line
@@ -2031,67 +2031,39 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, 
	}

}



static void

qca8k_phylink_validate(struct dsa_switch *ds, int port,

		       unsigned long *supported,

		       struct phylink_link_state *state)

static void qca8k_phylink_get_caps(struct dsa_switch *ds, int port,

				   struct phylink_config *config)

{

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };



	switch (port) {

	case 0: /* 1st CPU port */

		if (state->interface != PHY_INTERFACE_MODE_NA &&

		    state->interface != PHY_INTERFACE_MODE_RGMII &&

		    state->interface != PHY_INTERFACE_MODE_RGMII_ID &&

		    state->interface != PHY_INTERFACE_MODE_RGMII_TXID &&

		    state->interface != PHY_INTERFACE_MODE_RGMII_RXID &&

		    state->interface != PHY_INTERFACE_MODE_SGMII)

			goto unsupported;

		phy_interface_set_rgmii(config->supported_interfaces);

		__set_bit(PHY_INTERFACE_MODE_SGMII,

			  config->supported_interfaces);

		break;



	case 1:

	case 2:

	case 3:

	case 4:

	case 5:

		/* Internal PHY */

		if (state->interface != PHY_INTERFACE_MODE_NA &&

		    state->interface != PHY_INTERFACE_MODE_GMII &&

		    state->interface != PHY_INTERFACE_MODE_INTERNAL)

			goto unsupported;

		__set_bit(PHY_INTERFACE_MODE_GMII,

			  config->supported_interfaces);

		__set_bit(PHY_INTERFACE_MODE_INTERNAL,

			  config->supported_interfaces);

		break;



	case 6: /* 2nd CPU port / external PHY */

		if (state->interface != PHY_INTERFACE_MODE_NA &&

		    state->interface != PHY_INTERFACE_MODE_RGMII &&

		    state->interface != PHY_INTERFACE_MODE_RGMII_ID &&

		    state->interface != PHY_INTERFACE_MODE_RGMII_TXID &&

		    state->interface != PHY_INTERFACE_MODE_RGMII_RXID &&

		    state->interface != PHY_INTERFACE_MODE_SGMII &&

		    state->interface != PHY_INTERFACE_MODE_1000BASEX)

			goto unsupported;

		phy_interface_set_rgmii(config->supported_interfaces);

		__set_bit(PHY_INTERFACE_MODE_SGMII,

			  config->supported_interfaces);

		__set_bit(PHY_INTERFACE_MODE_1000BASEX,

			  config->supported_interfaces);

		break;

	default:

unsupported:

		linkmode_zero(supported);

		return;

	}



	phylink_set_port_modes(mask);

	phylink_set(mask, Autoneg);



	phylink_set(mask, 1000baseT_Full);

	phylink_set(mask, 10baseT_Half);

	phylink_set(mask, 10baseT_Full);

	phylink_set(mask, 100baseT_Half);

	phylink_set(mask, 100baseT_Full);



	if (state->interface == PHY_INTERFACE_MODE_1000BASEX)

		phylink_set(mask, 1000baseX_Full);



	phylink_set(mask, Pause);

	phylink_set(mask, Asym_Pause);



	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);

	config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |

		MAC_10 | MAC_100 | MAC_1000FD;

}



static int
@@ -3045,7 +3017,7 @@ static const struct dsa_switch_ops qca8k_switch_ops = { 
	.port_vlan_filtering	= qca8k_port_vlan_filtering,

	.port_vlan_add		= qca8k_port_vlan_add,

	.port_vlan_del		= qca8k_port_vlan_del,

	.phylink_validate	= qca8k_phylink_validate,

	.phylink_get_caps	= qca8k_phylink_get_caps,

	.phylink_mac_link_state	= qca8k_phylink_mac_link_state,

	.phylink_mac_config	= qca8k_phylink_mac_config,

	.phylink_mac_link_down	= qca8k_phylink_mac_link_down,

drivers/net/dsa/xrs700x/xrs700x.c

+11 −18
Original line number Diff line number Diff line
@@ -442,34 +442,27 @@ static void xrs700x_teardown(struct dsa_switch *ds) 
	cancel_delayed_work_sync(&priv->mib_work);

}



static void xrs700x_phylink_validate(struct dsa_switch *ds, int port,

				     unsigned long *supported,

				     struct phylink_link_state *state)

static void xrs700x_phylink_get_caps(struct dsa_switch *ds, int port,

				     struct phylink_config *config)

{

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };



	switch (port) {

	case 0:

		__set_bit(PHY_INTERFACE_MODE_RMII,

			  config->supported_interfaces);

		config->mac_capabilities = MAC_10FD | MAC_100FD;

		break;



	case 1:

	case 2:

	case 3:

		phylink_set(mask, 1000baseT_Full);

		phy_interface_set_rgmii(config->supported_interfaces);

		config->mac_capabilities = MAC_10FD | MAC_100FD | MAC_1000FD;

		break;



	default:

		linkmode_zero(supported);

		dev_err(ds->dev, "Unsupported port: %i\n", port);

		return;

		break;

	}



	phylink_set_port_modes(mask);



	/* The switch only supports full duplex. */

	phylink_set(mask, 10baseT_Full);

	phylink_set(mask, 100baseT_Full);



	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);

}



static void xrs700x_mac_link_up(struct dsa_switch *ds, int port,
@@ -703,7 +696,7 @@ static const struct dsa_switch_ops xrs700x_ops = { 
	.setup			= xrs700x_setup,

	.teardown		= xrs700x_teardown,

	.port_stp_state_set	= xrs700x_port_stp_state_set,

	.phylink_validate	= xrs700x_phylink_validate,

	.phylink_get_caps	= xrs700x_phylink_get_caps,

	.phylink_mac_link_up	= xrs700x_mac_link_up,

	.get_strings		= xrs700x_get_strings,

	.get_sset_count		= xrs700x_get_sset_count,