Commit 33ad2800 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Georgi Djakov
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dt-bindings: interconnect: Add bindings for Qualcomm SDM660 NoC 



Add the bindings for the Qualcomm SDM660-class NoC, valid for
SDM630, SDM636, SDM660 and SDA variants.

Signed-off-by: default avatarAngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201017133718.31327-2-kholk11@gmail.com


Signed-off-by: default avatarGeorgi Djakov <georgi.djakov@linaro.org>
parent a38fd874

Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm SDM660 Network-On-Chip interconnect



maintainers:

  - AngeloGioacchino Del Regno <kholk11@gmail.com>



description: |

  The Qualcomm SDM660 interconnect providers support adjusting the

  bandwidth requirements between the various NoC fabrics.



properties:

  reg:

    maxItems: 1



  compatible:

    enum:

      - qcom,sdm660-a2noc

      - qcom,sdm660-bimc

      - qcom,sdm660-cnoc

      - qcom,sdm660-gnoc

      - qcom,sdm660-mnoc

      - qcom,sdm660-snoc



  '#interconnect-cells':

    const: 1



  clocks:

    minItems: 1

    maxItems: 3



  clock-names:

    minItems: 1

    maxItems: 3



required:

  - compatible

  - reg

  - '#interconnect-cells'

  - clock-names

  - clocks



additionalProperties: false



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sdm660-mnoc

    then:

      properties:

        clocks:

          items:

            - description: Bus Clock.

            - description: Bus A Clock.

            - description: CPU-NoC High-performance Bus Clock.

        clock-names:

          items:

            - const: bus

            - const: bus_a

            - const: iface



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sdm660-a2noc

              - qcom,sdm660-bimc

              - qcom,sdm660-cnoc

              - qcom,sdm660-gnoc

              - qcom,sdm660-snoc

    then:

      properties:

        clocks:

          items:

            - description: Bus Clock.

            - description: Bus A Clock.

        clock-names:

          items:

            - const: bus

            - const: bus_a



examples:

  - |

      #include <dt-bindings/clock/qcom,rpmcc.h>

      #include <dt-bindings/clock/qcom,mmcc-sdm660.h>



      bimc: interconnect@1008000 {

              compatible = "qcom,sdm660-bimc";

              reg = <0x01008000 0x78000>;

              #interconnect-cells = <1>;

              clock-names = "bus", "bus_a";

              clocks = <&rpmcc RPM_SMD_BIMC_CLK>,

                       <&rpmcc RPM_SMD_BIMC_A_CLK>;

      };



      cnoc: interconnect@1500000 {

              compatible = "qcom,sdm660-cnoc";

              reg = <0x01500000 0x10000>;

              #interconnect-cells = <1>;

              clock-names = "bus", "bus_a";

              clocks = <&rpmcc RPM_SMD_CNOC_CLK>,

                       <&rpmcc RPM_SMD_CNOC_A_CLK>;

      };



      snoc: interconnect@1626000 {

              compatible = "qcom,sdm660-snoc";

              reg = <0x01626000 0x7090>;

              #interconnect-cells = <1>;

              clock-names = "bus", "bus_a";

              clocks = <&rpmcc RPM_SMD_SNOC_CLK>,

                       <&rpmcc RPM_SMD_SNOC_A_CLK>;

      };



      a2noc: interconnect@1704000 {

              compatible = "qcom,sdm660-a2noc";

              reg = <0x01704000 0xc100>;

              #interconnect-cells = <1>;

              clock-names = "bus", "bus_a";

              clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,

                       <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;

      };



      mnoc: interconnect@1745000 {

              compatible = "qcom,sdm660-mnoc";

              reg = <0x01745000 0xa010>;

              #interconnect-cells = <1>;

              clock-names = "bus", "bus_a", "iface";

              clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>,

                       <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>,

                       <&mmcc AHB_CLK_SRC>;

      };



      gnoc: interconnect@17900000 {

              compatible = "qcom,sdm660-gnoc";

              reg = <0x17900000 0xe000>;

              #interconnect-cells = <1>;

              clock-names = "bus", "bus_a";

              clocks = <&xo_board>, <&xo_board>;

      };

include/dt-bindings/interconnect/qcom,sdm660.h

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/* SPDX-License-Identifier: GPL-2.0 */

/* SDM660 interconnect IDs */



#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDM660_H

#define __DT_BINDINGS_INTERCONNECT_QCOM_SDM660_H



/* A2NOC */

#define MASTER_IPA			0

#define MASTER_CNOC_A2NOC		1

#define MASTER_SDCC_1			2

#define MASTER_SDCC_2			3

#define MASTER_BLSP_1			4

#define MASTER_BLSP_2			5

#define MASTER_UFS			6

#define MASTER_USB_HS			7

#define MASTER_USB3			8

#define MASTER_CRYPTO_C0		9

#define SLAVE_A2NOC_SNOC		10



/* BIMC */

#define MASTER_GNOC_BIMC		0

#define MASTER_OXILI			1

#define MASTER_MNOC_BIMC		2

#define MASTER_SNOC_BIMC		3

#define MASTER_PIMEM			4

#define SLAVE_EBI			5

#define SLAVE_HMSS_L3			6

#define SLAVE_BIMC_SNOC			7



/* CNOC */

#define MASTER_SNOC_CNOC		0

#define MASTER_QDSS_DAP			1

#define SLAVE_CNOC_A2NOC		2

#define SLAVE_MPM			3

#define SLAVE_PMIC_ARB			4

#define SLAVE_TLMM_NORTH		5

#define SLAVE_TCSR			6

#define SLAVE_PIMEM_CFG			7

#define SLAVE_IMEM_CFG			8

#define SLAVE_MESSAGE_RAM		9

#define SLAVE_GLM			10

#define SLAVE_BIMC_CFG			11

#define SLAVE_PRNG			12

#define SLAVE_SPDM			13

#define SLAVE_QDSS_CFG			14

#define SLAVE_CNOC_MNOC_CFG		15

#define SLAVE_SNOC_CFG			16

#define SLAVE_QM_CFG			17

#define SLAVE_CLK_CTL			18

#define SLAVE_MSS_CFG			19

#define SLAVE_TLMM_SOUTH		20

#define SLAVE_UFS_CFG			21

#define SLAVE_A2NOC_CFG			22

#define SLAVE_A2NOC_SMMU_CFG		23

#define SLAVE_GPUSS_CFG			24

#define SLAVE_AHB2PHY			25

#define SLAVE_BLSP_1			26

#define SLAVE_SDCC_1			27

#define SLAVE_SDCC_2			28

#define SLAVE_TLMM_CENTER		29

#define SLAVE_BLSP_2			30

#define SLAVE_PDM			31

#define SLAVE_CNOC_MNOC_MMSS_CFG	32

#define SLAVE_USB_HS			33

#define SLAVE_USB3_0			34

#define SLAVE_SRVC_CNOC			35



/* GNOC */

#define MASTER_APSS_PROC		0

#define SLAVE_GNOC_BIMC			1

#define SLAVE_GNOC_SNOC			2



/* MNOC */

#define MASTER_CPP			0

#define MASTER_JPEG			1

#define MASTER_MDP_P0			2

#define MASTER_MDP_P1			3

#define MASTER_VENUS			4

#define MASTER_VFE			5

#define SLAVE_MNOC_BIMC			6

#define MASTER_CNOC_MNOC_MMSS_CFG	7

#define MASTER_CNOC_MNOC_CFG		8

#define SLAVE_CAMERA_CFG		9

#define SLAVE_CAMERA_THROTTLE_CFG	10

#define SLAVE_MISC_CFG			11

#define SLAVE_VENUS_THROTTLE_CFG	12

#define SLAVE_VENUS_CFG			13

#define SLAVE_MMSS_CLK_XPU_CFG		14

#define SLAVE_MMSS_CLK_CFG		15

#define SLAVE_MNOC_MPU_CFG		16

#define SLAVE_DISPLAY_CFG		17

#define SLAVE_CSI_PHY_CFG		18

#define SLAVE_DISPLAY_THROTTLE_CFG	19

#define SLAVE_SMMU_CFG			20

#define SLAVE_SRVC_MNOC			21



/* SNOC */

#define MASTER_QDSS_ETR			0

#define MASTER_QDSS_BAM			1

#define MASTER_SNOC_CFG			2

#define MASTER_BIMC_SNOC		3

#define MASTER_A2NOC_SNOC		4

#define MASTER_GNOC_SNOC		5

#define SLAVE_HMSS			6

#define SLAVE_LPASS			7

#define SLAVE_WLAN			8

#define SLAVE_CDSP			9

#define SLAVE_IPA			10

#define SLAVE_SNOC_BIMC			11

#define SLAVE_SNOC_CNOC			12

#define SLAVE_IMEM			13

#define SLAVE_PIMEM			14

#define SLAVE_QDSS_STM			15

#define SLAVE_SRVC_SNOC			16



#endif