Commit 33a9583f authored by Danielle Ratson's avatar Danielle Ratson Committed by David S. Miller
Browse files

mlxsw: Rename 'read_frc_capable' bit to 'read_clock_capable' 



Rename the 'read_frc_capable' bit to 'read_clock_capable' since now it can
be both the FRC and UTC clocks.

Signed-off-by: default avatarDanielle Ratson <danieller@nvidia.com>
Reviewed-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 448e9cb3

drivers/net/ethernet/mellanox/mlxsw/core.h

+1 −1
Original line number Diff line number Diff line
@@ -487,7 +487,7 @@ struct mlxsw_bus_info { 
	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];

	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];

	u8 low_frequency:1,

	   read_frc_capable:1;

	   read_clock_capable:1;

};



struct mlxsw_hwmon;

drivers/net/ethernet/mellanox/mlxsw/pci.c

+1 −1
Original line number Diff line number Diff line
@@ -1923,7 +1923,7 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 
	mlxsw_pci->bus_info.device_kind = driver_name;

	mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev);

	mlxsw_pci->bus_info.dev = &pdev->dev;

	mlxsw_pci->bus_info.read_frc_capable = true;

	mlxsw_pci->bus_info.read_clock_capable = true;

	mlxsw_pci->id = id;



	err = mlxsw_core_bus_device_register(&mlxsw_pci->bus_info,

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+1 −1
Original line number Diff line number Diff line
@@ -3096,7 +3096,7 @@ static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core, 
		goto err_router_init;

	}



	if (mlxsw_sp->bus_info->read_frc_capable) {

	if (mlxsw_sp->bus_info->read_clock_capable) {

		/* NULL is a valid return value from clock_init */

		mlxsw_sp->clock =

			mlxsw_sp->ptp_ops->clock_init(mlxsw_sp,