Commit 339ec951 authored by Ian Rogers's avatar Ian Rogers Committed by Arnaldo Carvalho de Melo
Browse files

perf vendor events intel: Update SKX uncore 

JSON uncore events are generated for Skylake Server for v1.26
with events from:

https://download.01.org/perfmon/SKX/

New event names are added, that match the original JSON names,
due to an update to:

https://github.com/intel/event-converter-for-linux-perf/



Signed-off-by: default avatarIan Rogers <irogers@google.com>
Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.garry@huawei.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20220413210503.3256922-5-irogers@google.com


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent dd498d08

tools/perf/pmu-events/arch/x86/skylakex/uncore-memory.json

+20 −0
Original line number Diff line number Diff line
@@ -9,6 +9,16 @@ 
        "UMask": "0x3",

        "Unit": "iMC"

    },

    {

        "BriefDescription": "read requests to memory controller",

        "Counter": "0,1,2,3",

        "EventCode": "0x4",

        "EventName": "UNC_M_CAS_COUNT.RD",

        "PerPkg": "1",

        "ScaleUnit": "64Bytes",

        "UMask": "0x3",

        "Unit": "iMC"

    },

    {

        "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",

        "Counter": "0,1,2,3",
@@ -19,6 +29,16 @@ 
        "UMask": "0xC",

        "Unit": "iMC"

    },

    {

        "BriefDescription": "write requests to memory controller",

        "Counter": "0,1,2,3",

        "EventCode": "0x4",

        "EventName": "UNC_M_CAS_COUNT.WR",

        "PerPkg": "1",

        "ScaleUnit": "64Bytes",

        "UMask": "0xC",

        "Unit": "iMC"

    },

    {

        "BriefDescription": "Memory controller clock ticks",

        "Counter": "0,1,2,3",

tools/perf/pmu-events/arch/x86/skylakex/uncore-other.json

+92 −0
Original line number Diff line number Diff line
@@ -16,6 +16,16 @@ 
        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ",

        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",

        "Filter": "config1=0x40e33",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.ia_miss",

        "Counter": "0,1,2,3",
@@ -26,6 +36,16 @@ 
        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "MMIO reads",

        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",

        "Filter": "config1=0x40040e33",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss",

        "Counter": "0,1,2,3",
@@ -36,6 +56,16 @@ 
        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "MMIO writes",

        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",

        "Filter": "config1=0x40041e33",

        "PerPkg": "1",

        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "Streaming stores (full cache line). Derived from unc_cha_tor_inserts.ia_miss",

        "Counter": "0,1,2,3",
@@ -47,6 +77,17 @@ 
        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "Streaming stores (full cache line)",

        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",

        "Filter": "config1=0x41833",

        "PerPkg": "1",

        "ScaleUnit": "64Bytes",

        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "Streaming stores (partial cache line). Derived from unc_cha_tor_inserts.ia_miss",

        "Counter": "0,1,2,3",
@@ -58,6 +99,17 @@ 
        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "Streaming stores (partial cache line)",

        "Counter": "0,1,2,3",

        "EventCode": "0x35",

        "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS",

        "Filter": "config1=0x41a33",

        "PerPkg": "1",

        "ScaleUnit": "64Bytes",

        "UMask": "0x21",

        "Unit": "CHA"

    },

    {

        "BriefDescription": "read requests from home agent",

        "Counter": "0,1,2,3",
@@ -113,6 +165,16 @@ 
        "UMask": "0xf",

        "Unit": "UPI LL"

    },

    {

        "BriefDescription": "UPI interconnect send bandwidth for payload",

        "Counter": "0,1,2,3",

        "EventCode": "0x2",

        "EventName": "UNC_UPI_TxL_FLITS.ALL_DATA",

        "PerPkg": "1",

        "ScaleUnit": "7.11E-06Bytes",

        "UMask": "0xf",

        "Unit": "UPI LL"

    },

    {

        "BriefDescription": "PCI Express bandwidth reading at IIO, part 0",

        "Counter": "0,1",
@@ -176,6 +238,21 @@ 
        "UMask": "0x04",

        "Unit": "IIO"

    },

    {

        "BriefDescription": "PCI Express bandwidth reading at IIO",

        "Counter": "0,1",

        "EventCode": "0x83",

        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",

        "FCMask": "0x07",

        "Filter": "ch_mask=0x1f",

        "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",

        "MetricName": "LLC_MISSES.PCIE_READ",

        "PerPkg": "1",

        "PortMask": "0x01",

        "ScaleUnit": "4Bytes",

        "UMask": "0x04",

        "Unit": "IIO"

    },

    {

        "BriefDescription": "PCI Express bandwidth writing at IIO, part 0",

        "Counter": "0,1",
@@ -239,6 +316,21 @@ 
        "UMask": "0x01",

        "Unit": "IIO"

    },

    {

        "BriefDescription": "PCI Express bandwidth writing at IIO",

        "Counter": "0,1",

        "EventCode": "0x83",

        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",

        "FCMask": "0x07",

        "Filter": "ch_mask=0x1f",

        "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",

        "MetricName": "LLC_MISSES.PCIE_WRITE",

        "PerPkg": "1",

        "PortMask": "0x01",

        "ScaleUnit": "4Bytes",

        "UMask": "0x01",

        "Unit": "IIO"

    },

    {

        "BriefDescription": "Core Cross Snoops Issued; Multiple Core Requests",

        "Counter": "0,1,2,3",