Commit 3389d302 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue 



Tony Nguyen says:

====================
1GbE Intel Wired LAN Driver Updates 2021-07-20

This series contains updates to e1000e and igc drivers.

Sasha adds initial S0ix support for devices with CSME and adds polling
for exiting of DPG. He sets the PHY to low power idle when in S0ix. He
also adds support for new device IDs for and adds a space to debug
messaging to help with readability for e1000e.

For igc, he ensures that q_vector array is not accessed beyond its
bounds and removes unneeded PHY related checks.

Tree Davies corrects a spelling mistake in e1000e.

Muhammad corrects the value written when there is no TSN offloading
and adjusts timeout value to avoid possible Tx hang for igc.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 41667a93 b27b8dc7

drivers/net/ethernet/intel/e1000e/ethtool.c

+2 −0
Original line number Diff line number Diff line
@@ -903,6 +903,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		mask |= BIT(18);

		break;

	default:
@@ -1569,6 +1570,7 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		fext_nvm11 = er32(FEXTNVM11);

		fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;

		ew32(FEXTNVM11, fext_nvm11);

drivers/net/ethernet/intel/e1000e/hw.h

+9 −0
Original line number Diff line number Diff line
@@ -98,14 +98,22 @@ struct e1000_hw; 
#define E1000_DEV_ID_PCH_TGP_I219_V14		0x15FA

#define E1000_DEV_ID_PCH_TGP_I219_LM15		0x15F4

#define E1000_DEV_ID_PCH_TGP_I219_V15		0x15F5

#define E1000_DEV_ID_PCH_RPL_I219_LM23		0x0DC5

#define E1000_DEV_ID_PCH_RPL_I219_V23		0x0DC6

#define E1000_DEV_ID_PCH_ADP_I219_LM16		0x1A1E

#define E1000_DEV_ID_PCH_ADP_I219_V16		0x1A1F

#define E1000_DEV_ID_PCH_ADP_I219_LM17		0x1A1C

#define E1000_DEV_ID_PCH_ADP_I219_V17		0x1A1D

#define E1000_DEV_ID_PCH_RPL_I219_LM22		0x0DC7

#define E1000_DEV_ID_PCH_RPL_I219_V22		0x0DC8

#define E1000_DEV_ID_PCH_MTP_I219_LM18		0x550A

#define E1000_DEV_ID_PCH_MTP_I219_V18		0x550B

#define E1000_DEV_ID_PCH_MTP_I219_LM19		0x550C

#define E1000_DEV_ID_PCH_MTP_I219_V19		0x550D

#define E1000_DEV_ID_PCH_LNP_I219_LM20		0x550E

#define E1000_DEV_ID_PCH_LNP_I219_V20		0x550F

#define E1000_DEV_ID_PCH_LNP_I219_LM21		0x5510

#define E1000_DEV_ID_PCH_LNP_I219_V21		0x5511



#define E1000_REVISION_4	4
@@ -132,6 +140,7 @@ enum e1000_mac_type { 
	e1000_pch_tgp,

	e1000_pch_adp,

	e1000_pch_mtp,

	e1000_pch_lnp,

};



enum e1000_media_type {

drivers/net/ethernet/intel/e1000e/ich8lan.c

+11 −2
Original line number Diff line number Diff line
@@ -321,6 +321,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		if (e1000_phy_is_accessible_pchlan(hw))

			break;
@@ -466,6 +467,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) 
		case e1000_pch_tgp:

		case e1000_pch_adp:

		case e1000_pch_mtp:

		case e1000_pch_lnp:

			/* In case the PHY needs to be in mdio slow mode,

			 * set slow mode and try to get the PHY id again.

			 */
@@ -711,6 +713,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

	case e1000_pchlan:

		/* check management mode */

		mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan;
@@ -1266,9 +1269,11 @@ static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force) 
			usleep_range(10000, 11000);

		}

		if (firmware_bug)

			e_warn("ULP_CONFIG_DONE took %dmsec.  This is a firmware bug\n", i * 10);

			e_warn("ULP_CONFIG_DONE took %d msec. This is a firmware bug\n",

			       i * 10);

		else

			e_dbg("ULP_CONFIG_DONE cleared after %dmsec\n", i * 10);

			e_dbg("ULP_CONFIG_DONE cleared after %d msec\n",

			      i * 10);



		if (force) {

			mac_reg = er32(H2ME);
@@ -1663,6 +1668,7 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		rc = e1000_init_phy_params_pchlan(hw);

		break;

	default:
@@ -2118,6 +2124,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;

		break;

	default:
@@ -3162,6 +3169,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		bank1_offset = nvm->flash_bank_size;

		act_offset = E1000_ICH_NVM_SIG_WORD;
@@ -4101,6 +4109,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		word = NVM_COMPAT;

		valid_csum_mask = NVM_COMPAT_VALID_CSUM;

		break;

drivers/net/ethernet/intel/e1000e/ich8lan.h

+3 −0
Original line number Diff line number Diff line
@@ -41,12 +41,15 @@ 
#define E1000_FWSM_WLOCK_MAC_MASK	0x0380

#define E1000_FWSM_WLOCK_MAC_SHIFT	7

#define E1000_FWSM_ULP_CFG_DONE		0x00000400	/* Low power cfg done */

#define E1000_EXFWSM_DPG_EXIT_DONE	0x00000001



/* Shared Receive Address Registers */

#define E1000_SHRAL_PCH_LPT(_i)		(0x05408 + ((_i) * 8))

#define E1000_SHRAH_PCH_LPT(_i)		(0x0540C + ((_i) * 8))



#define E1000_H2ME		0x05B50	/* Host to ME */

#define E1000_H2ME_START_DPG	0x00000001	/* indicate the ME of DPG */

#define E1000_H2ME_EXIT_DPG	0x00000002	/* indicate the ME exit DPG */

#define E1000_H2ME_ULP		0x00000800	/* ULP Indication Bit */

#define E1000_H2ME_ENFORCE_SETTINGS	0x00001000	/* Enforce Settings */

drivers/net/ethernet/intel/e1000e/netdev.c

+215 −155
Original line number Diff line number Diff line
@@ -3550,6 +3550,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {

			/* Stable 24MHz frequency */

			incperiod = INCPERIOD_24MHZ;
@@ -4068,6 +4069,7 @@ void e1000e_reset(struct e1000_adapter *adapter) 
	case e1000_pch_tgp:

	case e1000_pch_adp:

	case e1000_pch_mtp:

	case e1000_pch_lnp:

		fc->refresh_time = 0xFFFF;

		fc->pause_time = 0xFFFF;
@@ -6343,6 +6345,14 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) 
	u32 mac_data;

	u16 phy_data;



	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {

		/* Request ME configure the device for S0ix */

		mac_data = er32(H2ME);

		mac_data |= E1000_H2ME_START_DPG;

		mac_data &= ~E1000_H2ME_EXIT_DPG;

		ew32(H2ME, mac_data);

	} else {

		/* Request driver configure the device to S0ix */

		/* Disable the periodic inband message,

		 * don't request PCIe clock in K1 page770_17[10:9] = 10b

		 */
@@ -6370,67 +6380,27 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) 
		ew32(CTRL_EXT, mac_data);



		/* DFT control: PHY bit: page769_20[0] = 1

		 * page769_20[7] - PHY PLL stop

		 * page769_20[8] - PHY go to the electrical idle

		 * page769_20[9] - PHY serdes disable

		 * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1

		 */

		e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);

		phy_data |= BIT(0);

		phy_data |= BIT(7);

		phy_data |= BIT(8);

		phy_data |= BIT(9);

		e1e_wphy(hw, I82579_DFT_CTRL, phy_data);



		mac_data = er32(EXTCNF_CTRL);

		mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;

		ew32(EXTCNF_CTRL, mac_data);



	/* Check MAC Tx/Rx packet buffer pointers.

	 * Reset MAC Tx/Rx packet buffer pointers to suppress any

	 * pending traffic indication that would prevent power gating.

	 */

	mac_data = er32(TDFH);

	if (mac_data)

		ew32(TDFH, 0);

	mac_data = er32(TDFT);

	if (mac_data)

		ew32(TDFT, 0);

	mac_data = er32(TDFHS);

	if (mac_data)

		ew32(TDFHS, 0);

	mac_data = er32(TDFTS);

	if (mac_data)

		ew32(TDFTS, 0);

	mac_data = er32(TDFPC);

	if (mac_data)

		ew32(TDFPC, 0);

	mac_data = er32(RDFH);

	if (mac_data)

		ew32(RDFH, 0);

	mac_data = er32(RDFT);

	if (mac_data)

		ew32(RDFT, 0);

	mac_data = er32(RDFHS);

	if (mac_data)

		ew32(RDFHS, 0);

	mac_data = er32(RDFTS);

	if (mac_data)

		ew32(RDFTS, 0);

	mac_data = er32(RDFPC);

	if (mac_data)

		ew32(RDFPC, 0);



		/* Enable the Dynamic Power Gating in the MAC */

		mac_data = er32(FEXTNVM7);

		mac_data |= BIT(22);

		ew32(FEXTNVM7, mac_data);



	/* Disable the time synchronization clock */

	mac_data = er32(FEXTNVM7);

	mac_data |= BIT(31);

	mac_data &= ~BIT(0);

	ew32(FEXTNVM7, mac_data);



	/* Dynamic Power Gating Enable */

	mac_data = er32(CTRL_EXT);

	mac_data |= BIT(3);

	ew32(CTRL_EXT, mac_data);



		/* Disable disconnected cable conditioning for Power Gating */

		mac_data = er32(DPGFR);

		mac_data |= BIT(2);
@@ -6469,22 +6439,97 @@ static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter) 
		ew32(FEXTNVM5, mac_data);

	}



	/* Disable the time synchronization clock */

	mac_data = er32(FEXTNVM7);

	mac_data |= BIT(31);

	mac_data &= ~BIT(0);

	ew32(FEXTNVM7, mac_data);



	/* Dynamic Power Gating Enable */

	mac_data = er32(CTRL_EXT);

	mac_data |= BIT(3);

	ew32(CTRL_EXT, mac_data);



	/* Check MAC Tx/Rx packet buffer pointers.

	 * Reset MAC Tx/Rx packet buffer pointers to suppress any

	 * pending traffic indication that would prevent power gating.

	 */

	mac_data = er32(TDFH);

	if (mac_data)

		ew32(TDFH, 0);

	mac_data = er32(TDFT);

	if (mac_data)

		ew32(TDFT, 0);

	mac_data = er32(TDFHS);

	if (mac_data)

		ew32(TDFHS, 0);

	mac_data = er32(TDFTS);

	if (mac_data)

		ew32(TDFTS, 0);

	mac_data = er32(TDFPC);

	if (mac_data)

		ew32(TDFPC, 0);

	mac_data = er32(RDFH);

	if (mac_data)

		ew32(RDFH, 0);

	mac_data = er32(RDFT);

	if (mac_data)

		ew32(RDFT, 0);

	mac_data = er32(RDFHS);

	if (mac_data)

		ew32(RDFHS, 0);

	mac_data = er32(RDFTS);

	if (mac_data)

		ew32(RDFTS, 0);

	mac_data = er32(RDFPC);

	if (mac_data)

		ew32(RDFPC, 0);

}



static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)

{

	struct e1000_hw *hw = &adapter->hw;

	bool firmware_bug = false;

	u32 mac_data;

	u16 phy_data;

	u32 i = 0;



	if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {

		/* Request ME unconfigure the device from S0ix */

		mac_data = er32(H2ME);

		mac_data &= ~E1000_H2ME_START_DPG;

		mac_data |= E1000_H2ME_EXIT_DPG;

		ew32(H2ME, mac_data);



		/* Poll up to 2.5 seconds for ME to unconfigure DPG.

		 * If this takes more than 1 second, show a warning indicating a

		 * firmware bug

		 */

		while (!(er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE)) {

			if (i > 100 && !firmware_bug)

				firmware_bug = true;



			if (i++ == 250) {

				e_dbg("Timeout (firmware bug): %d msec\n",

				      i * 10);

				break;

			}



			usleep_range(10000, 11000);

		}

		if (firmware_bug)

			e_warn("DPG_EXIT_DONE took %d msec. This is a firmware bug\n",

			       i * 10);

		else

			e_dbg("DPG_EXIT_DONE cleared after %d msec\n", i * 10);

	} else {

		/* Request driver unconfigure the device from S0ix */



		/* Disable the Dynamic Power Gating in the MAC */

		mac_data = er32(FEXTNVM7);

		mac_data &= 0xFFBFFFFF;

		ew32(FEXTNVM7, mac_data);



	/* Enable the time synchronization clock */

	mac_data = er32(FEXTNVM7);

	mac_data |= BIT(0);

	ew32(FEXTNVM7, mac_data);



		/* Disable mPHY power gating for any link and speed */

		mac_data = er32(FEXTNVM8);

		mac_data &= ~BIT(9);
@@ -6514,11 +6559,6 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) 
		mac_data &= ~BIT(2);

		ew32(DPGFR, mac_data);



	/* Disable Dynamic Power Gating */

	mac_data = er32(CTRL_EXT);

	mac_data &= 0xFFFFFFF7;

	ew32(CTRL_EXT, mac_data);



		/* Disable the Dynamic Clock Gating in the DMA and MAC */

		mac_data = er32(CTRL_EXT);

		mac_data &= 0xFFF7FFFF;
@@ -6558,6 +6598,18 @@ static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter) 
		ew32(CTRL_EXT, mac_data);

	}



	/* Disable Dynamic Power Gating */

	mac_data = er32(CTRL_EXT);

	mac_data &= 0xFFFFFFF7;

	ew32(CTRL_EXT, mac_data);



	/* Enable the time synchronization clock */

	mac_data = er32(FEXTNVM7);

	mac_data &= ~BIT(31);

	mac_data |= BIT(0);

	ew32(FEXTNVM7, mac_data);

}



static int e1000e_pm_freeze(struct device *dev)

{

	struct net_device *netdev = dev_get_drvdata(dev);
@@ -7677,7 +7729,7 @@ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
 * @pdev: PCI device information struct

 *

 * e1000_remove is called by the PCI subsystem to alert the driver

 * that it should release a PCI device.  The could be caused by a

 * that it should release a PCI device.  This could be caused by a

 * Hot-Plug event, or because the driver is going to be removed from

 * memory.

 **/
@@ -7850,14 +7902,22 @@ static const struct pci_device_id e1000_pci_tbl[] = { 
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_cnp },

	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_cnp },



	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */

};