Commit 33777a4e authored by Paul Gortmaker's avatar Paul Gortmaker Committed by Michael Ellerman
Browse files

powerpc: drop MPC8272_ADS platform support



The MPC8272-ADS also supported other 82xx CPU variants, had 64MB RAM,
8MB flash, and like the 85xx ADS platforms, was on a fairly large PCB
in order to have space for breakout connectors for all the features.

These 82xx platforms are two decades old, and originally made for a
small group of industry related people in order to assist in new OEM
board designs.  Given that, it makes sense to remove support today.

Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20230224204959.17425-2-paul.gortmaker@windriver.com
parent 248667f8
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Original line number Diff line number Diff line
@@ -329,7 +329,6 @@ image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b
image-$(CONFIG_PPC_MEDIA5200)		+= cuImage.media5200

# Board ports in arch/powerpc/platform/82xx/Kconfig
image-$(CONFIG_MPC8272_ADS)		+= cuImage.mpc8272ads
image-$(CONFIG_PQ2FADS)			+= cuImage.pq2fads
image-$(CONFIG_EP8248E)			+= dtbImage.ep8248e

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Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * MPC8272 ADS Device Tree Source
 *
 * Copyright 2005,2008 Freescale Semiconductor Inc.
 */

/dts-v1/;

/ {
	model = "MPC8272ADS";
	compatible = "fsl,mpc8272ads";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &eth0;
		ethernet1 = &eth1;
		serial0 = &scc1;
		serial1 = &scc4;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8272@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <16384>;
			i-cache-size = <16384>;
			timebase-frequency = <0>;
			bus-frequency = <0>;
			clock-frequency = <0>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0>;
	};

	localbus@f0010100 {
		compatible = "fsl,mpc8272-localbus",
		             "fsl,pq2-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <0xf0010100 0x40>;

		ranges = <0x0 0x0 0xff800000 0x00800000
		          0x1 0x0 0xf4500000 0x8000
		          0x3 0x0 0xf8200000 0x8000>;

		flash@0,0 {
			compatible = "jedec-flash";
			reg = <0x0 0x0 0x00800000>;
			bank-width = <4>;
			device-width = <1>;
		};

		board-control@1,0 {
			reg = <0x1 0x0 0x20>;
			compatible = "fsl,mpc8272ads-bcsr";
		};

		PCI_PIC: interrupt-controller@3,0 {
			compatible = "fsl,mpc8272ads-pci-pic",
			             "fsl,pq2ads-pci-pic";
			#interrupt-cells = <1>;
			interrupt-controller;
			reg = <0x3 0x0 0x8>;
			interrupt-parent = <&PIC>;
			interrupts = <20 8>;
		};
	};


	pci@f0010800 {
		device_type = "pci";
		reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
		compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		clock-frequency = <66666666>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
		                 /* IDSEL 0x16 */
		                 0xb000 0x0 0x0 0x1 &PCI_PIC 0
		                 0xb000 0x0 0x0 0x2 &PCI_PIC 1
		                 0xb000 0x0 0x0 0x3 &PCI_PIC 2
		                 0xb000 0x0 0x0 0x4 &PCI_PIC 3

		                 /* IDSEL 0x17 */
		                 0xb800 0x0 0x0 0x1 &PCI_PIC 4
		                 0xb800 0x0 0x0 0x2 &PCI_PIC 5
		                 0xb800 0x0 0x0 0x3 &PCI_PIC 6
		                 0xb800 0x0 0x0 0x4 &PCI_PIC 7

		                 /* IDSEL 0x18 */
		                 0xc000 0x0 0x0 0x1 &PCI_PIC 8
		                 0xc000 0x0 0x0 0x2 &PCI_PIC 9
		                 0xc000 0x0 0x0 0x3 &PCI_PIC 10
		                 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;

		interrupt-parent = <&PIC>;
		interrupts = <18 8>;
		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
		          0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
		          0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
	};

	soc@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "fsl,mpc8272", "fsl,pq2-soc";
		ranges = <0x0 0xf0000000 0x53000>;

		// Temporary -- will go away once kernel uses ranges for get_immrbase().
		reg = <0xf0000000 0x53000>;

		cpm@119c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
			reg = <0x119c0 0x30>;
			ranges;

			muram@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x0 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x2000 0x9800 0x800>;
				};
			};

			brg@119f0 {
				compatible = "fsl,mpc8272-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <0x119f0 0x10 0x115f0 0x10>;
			};

			scc1: serial@11a00 {
				device_type = "serial";
				compatible = "fsl,mpc8272-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x11a00 0x20 0x8000 0x100>;
				interrupts = <40 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
			};

			scc4: serial@11a60 {
				device_type = "serial";
				compatible = "fsl,mpc8272-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x11a60 0x20 0x8300 0x100>;
				interrupts = <43 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <4>;
				fsl,cpm-command = <0xce00000>;
			};

			usb@11b60 {
				compatible = "fsl,mpc8272-cpm-usb";
				reg = <0x11b60 0x40 0x8b00 0x100>;
				interrupts = <11 8>;
				interrupt-parent = <&PIC>;
				mode = "peripheral";
			};

			mdio@10d40 {
				compatible = "fsl,mpc8272ads-mdio-bitbang",
				             "fsl,mpc8272-mdio-bitbang",
				             "fsl,cpm2-mdio-bitbang";
				reg = <0x10d40 0x14>;
				#address-cells = <1>;
				#size-cells = <0>;
				fsl,mdio-pin = <18>;
				fsl,mdc-pin = <19>;

				PHY0: ethernet-phy@0 {
					interrupt-parent = <&PIC>;
					interrupts = <23 8>;
					reg = <0x0>;
				};

				PHY1: ethernet-phy@1 {
					interrupt-parent = <&PIC>;
					interrupts = <23 8>;
					reg = <0x3>;
				};
			};

			eth0: ethernet@11300 {
				device_type = "network";
				compatible = "fsl,mpc8272-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				interrupts = <32 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY0>;
				linux,network-index = <0>;
				fsl,cpm-command = <0x12000300>;
			};

			eth1: ethernet@11320 {
				device_type = "network";
				compatible = "fsl,mpc8272-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				interrupts = <33 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY1>;
				linux,network-index = <1>;
				fsl,cpm-command = <0x16200300>;
			};

			i2c@11860 {
				compatible = "fsl,mpc8272-i2c",
					     "fsl,cpm2-i2c";
				reg = <0x11860 0x20 0x8afc 0x2>;
				interrupts = <1 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-command = <0x29600000>;
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};

		PIC: interrupt-controller@10c00 {
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <0x10c00 0x80>;
			compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
		};

		crypto@30000 {
			compatible = "fsl,sec1.0";
			reg = <0x40000 0x13000>;
			interrupts = <47 0x8>;
			interrupt-parent = <&PIC>;
			fsl,num-channels = <4>;
			fsl,channel-fifo-len = <24>;
			fsl,exec-units-mask = <0x7e>;
			fsl,descriptor-types-mask = <0x1010415>;
		};
	};

	chosen {
		stdout-path = "/soc/cpm/serial@11a00";
	};
};
+0 −79
Original line number Diff line number Diff line
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_PPC_CHRP is not set
# CONFIG_PPC_PMAC is not set
CONFIG_PPC_82xx=y
CONFIG_MPC8272_ADS=y
CONFIG_BINFMT_MISC=y
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_SYN_COOKIES=y
CONFIG_NETFILTER=y
# CONFIG_FW_LOADER is not set
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
# CONFIG_MTD_CFI_I1 is not set
# CONFIG_MTD_CFI_I2 is not set
CONFIG_MTD_CFI_I4=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_FS_ENET=y
# CONFIG_FS_ENET_HAS_SCC is not set
CONFIG_FS_ENET_MDIO_FCC=y
CONFIG_DAVICOM_PHY=y
CONFIG_PPP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_INPUT_EVDEV=y
# CONFIG_VT is not set
CONFIG_SERIAL_CPM=y
CONFIG_SERIAL_CPM_CONSOLE=y
# CONFIG_HWMON is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT4_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_ROOT_NFS=y
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_UTF8=y
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_BDI_SWITCH=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_HW is not set
+0 −1
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@ CONFIG_PPC_MPC52xx=y
CONFIG_PPC_EFIKA=y
CONFIG_PPC_MPC5200_BUGFIX=y
CONFIG_PPC_82xx=y
CONFIG_MPC8272_ADS=y
CONFIG_PQ2FADS=y
CONFIG_EP8248E=y
CONFIG_MGCOGE=y
+0 −11
Original line number Diff line number Diff line
@@ -5,17 +5,6 @@ menuconfig PPC_82xx

if PPC_82xx

config MPC8272_ADS
	bool "Freescale MPC8272 ADS"
	select DEFAULT_UIMAGE
	select PQ2ADS
	select 8272
	select 8260
	select FSL_SOC
	select PQ2_ADS_PCI_PIC if PCI
	help
	  This option enables support for the MPC8272 ADS board

config PQ2FADS
	bool "Freescale PQ2FADS"
	select DEFAULT_UIMAGE
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