Commit 3310bae8 authored by Masahiro Yamada's avatar Masahiro Yamada
Browse files

modpost: fix section_mismatch message for R_ARM_THM_{CALL,JUMP24,JUMP19} 



addend_arm_rel() processes R_ARM_THM_CALL, R_ARM_THM_JUMP24,
R_ARM_THM_JUMP19 in a wrong way.

Here, test code.

[test code for R_ARM_THM_JUMP24]

  .section .init.text,"ax"
  bar:
          bx      lr

  .section .text,"ax"
  .globl foo
  foo:
          b       bar

[test code for R_ARM_THM_CALL]

  .section .init.text,"ax"
  bar:
          bx      lr

  .section .text,"ax"
  .globl foo
  foo:
          push    {lr}
          bl      bar
          pop     {pc}

If you compile it with CONFIG_THUMB2_KERNEL=y, modpost will show the
symbol name, (unknown).

  WARNING: modpost: vmlinux.o: section mismatch in reference: foo (section: .text) -> (unknown) (section: .init.text)

(You need to use GNU linker instead of LLD to reproduce it.)

Fix the code to make modpost show the correct symbol name. I checked
arch/arm/kernel/module.c to learn the encoding of R_ARM_THM_CALL and
R_ARM_THM_JUMP24. The module does not support R_ARM_THM_JUMP19, but
I checked its encoding in ARM ARM.

The '+4' is the compensation for pc-relative instruction. It is
documented in "ELF for the Arm Architecture" [1].

  "If the relocation is pc-relative then compensation for the PC bias
  (the PC value is 8 bytes ahead of the executing instruction in Arm
  state and 4 bytes in Thumb state) must be encoded in the relocation
  by the object producer."

[1]: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst

Fixes: c9698e5c ("ARM: 7964/1: Detect section mismatches in thumb relocations")
Signed-off-by: default avatarMasahiro Yamada <masahiroy@kernel.org>
parent cd1824fb

scripts/mod/modpost.c

+47 −6
Original line number Diff line number Diff line
@@ -1276,7 +1276,7 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) 
	unsigned int r_typ = ELF_R_TYPE(r->r_info);

	Elf_Sym *sym = elf->symtab_start + ELF_R_SYM(r->r_info);

	void *loc = reloc_location(elf, sechdr, r);

	uint32_t inst, upper, lower;

	uint32_t inst, upper, lower, sign, j1, j2;

	int32_t offset;



	switch (r_typ) {
@@ -1309,13 +1309,54 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) 
				       15);

		r->r_addend = offset + sym->st_value;

		break;

	case R_ARM_THM_JUMP19:

		/*

		 * Encoding T3:

		 * S     = upper[10]

		 * imm6  = upper[5:0]

		 * J1    = lower[13]

		 * J2    = lower[11]

		 * imm11 = lower[10:0]

		 * imm32 = SignExtend(S:J2:J1:imm6:imm11:'0')

		 */

		upper = TO_NATIVE(*(uint16_t *)loc);

		lower = TO_NATIVE(*((uint16_t *)loc + 1));



		sign = (upper >> 10) & 1;

		j1 = (lower >> 13) & 1;

		j2 = (lower >> 11) & 1;

		offset = sign_extend32((sign << 20) | (j2 << 19) | (j1 << 18) |

				       ((upper & 0x03f) << 12) |

				       ((lower & 0x07ff) << 1),

				       20);

		r->r_addend = offset + sym->st_value + 4;

		break;

	case R_ARM_THM_CALL:

	case R_ARM_THM_JUMP24:

	case R_ARM_THM_JUMP19:

		/* From ARM ABI: ((S + A) | T) - P */

		r->r_addend = (int)(long)(elf->hdr +

			      sechdr->sh_offset +

			      (r->r_offset - sechdr->sh_addr));

		/*

		 * Encoding T4:

		 * S     = upper[10]

		 * imm10 = upper[9:0]

		 * J1    = lower[13]

		 * J2    = lower[11]

		 * imm11 = lower[10:0]

		 * I1    = NOT(J1 XOR S)

		 * I2    = NOT(J2 XOR S)

		 * imm32 = SignExtend(S:I1:I2:imm10:imm11:'0')

		 */

		upper = TO_NATIVE(*(uint16_t *)loc);

		lower = TO_NATIVE(*((uint16_t *)loc + 1));



		sign = (upper >> 10) & 1;

		j1 = (lower >> 13) & 1;

		j2 = (lower >> 11) & 1;

		offset = sign_extend32((sign << 24) |

				       ((~(j1 ^ sign) & 1) << 23) |

				       ((~(j2 ^ sign) & 1) << 22) |

				       ((upper & 0x03ff) << 12) |

				       ((lower & 0x07ff) << 1),

				       24);

		r->r_addend = offset + sym->st_value + 4;

		break;

	default:

		return 1;