Commit 326d0ff7 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/pm: correct platformcaps setup 



Correct Polaris10 platformcaps setup.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 55411d16

drivers/gpu/drm/amd/pm/powerplay/hwmgr/hwmgr.c

+3 −2
Original line number Diff line number Diff line
@@ -486,7 +486,8 @@ int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr) 
	phm_cap_set(hwmgr->platform_descriptor.platformCaps,

					PHM_PlatformCaps_AutomaticDCTransition);



	if (hwmgr->chip_id != CHIP_POLARIS10)

	if (((hwmgr->chip_id == CHIP_POLARIS11) && !hwmgr->is_kicker) ||

	    (hwmgr->chip_id == CHIP_POLARIS12))

		phm_cap_set(hwmgr->platform_descriptor.platformCaps,

				PHM_PlatformCaps_SPLLShutdownSupport);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

+11 −0
Original line number Diff line number Diff line
@@ -1823,6 +1823,17 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) 
		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,

			PHM_PlatformCaps_EngineSpreadSpectrumSupport);

	}



	if ((adev->pdev->device == 0x699F) &&

	    (adev->pdev->revision == 0xCF)) {

		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,

				PHM_PlatformCaps_PowerContainment);

		data->enable_tdc_limit_feature = false;

		data->enable_pkg_pwr_tracking_feature = false;

		data->disable_edc_leakage_controller = true;

		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,

					PHM_PlatformCaps_ClockStretcher);

	}

}



static int smu7_calculate_ro_range(struct pp_hwmgr *hwmgr)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

+5 −2
Original line number Diff line number Diff line
@@ -2041,8 +2041,11 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr) 
	if (atomctrl_get_pp_assign_pin(hwmgr, PP_AC_DC_SWITCH_GPIO_PINID,

			&gpio_pin)) {

		table->AcDcGpio = gpio_pin.uc_gpio_pin_bit_shift;

		if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

				PHM_PlatformCaps_AutomaticDCTransition) &&

		    !smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UseNewGPIOScheme, NULL))

			phm_cap_set(hwmgr->platform_descriptor.platformCaps,

				PHM_PlatformCaps_AutomaticDCTransition);

					PHM_PlatformCaps_SMCtoPPLIBAcdcGpioScheme);

	} else {

		table->AcDcGpio = SMU7_UNUSED_GPIO_PIN;

		phm_cap_unset(hwmgr->platform_descriptor.platformCaps,