Commit 3229319e authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915/dsb: Align DSB register writes to 8 bytes 



Every DSB instruction has to be 8byte aligned. Make sure
that is the case for the non-indexed register writes as well.
The way this could end up unaligned is we emitted an odd
number of indexed register writes beforehand.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221216003810.13338-4-ville.syrjala@linux.intel.com


Reviewed-by: default avatarAnimesh Manna <animesh.manna@intel.com>
parent f9e2ada6

drivers/gpu/drm/i915/display/intel_dsb.c

+3 −0
Original line number Diff line number Diff line
@@ -172,6 +172,9 @@ void intel_dsb_reg_write(struct intel_dsb *dsb, 
		return;

	}



	/* Every instruction should be 8 byte aligned. */

	dsb->free_pos = ALIGN(dsb->free_pos, 2);



	dsb->ins_start_offset = dsb->free_pos;

	buf[dsb->free_pos++] = val;

	buf[dsb->free_pos++] = (DSB_OPCODE_MMIO_WRITE  << DSB_OPCODE_SHIFT) |