Commit 321a8be3 authored by Guo Ren's avatar Guo Ren Committed by Marc Zyngier
Browse files

dt-bindings: update riscv plic compatible string 



Add the compatible string "thead,c900-plic" to the riscv plic
bindings to support allwinner d1 SOC which contains c906 core.

Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
Cc: Anup Patel <anup@brainfault.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Samuel Holland <samuel@sholland.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220130135634.1213301-2-guoren@kernel.org
parent eba1e44b

Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

+15 −6
Original line number Diff line number Diff line
@@ -35,6 +35,10 @@ description: 
  contains a specific memory layout, which is documented in chapter 8 of the

  SiFive U5 Coreplex Series Manual <https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf>.



  The thead,c900-plic is different from sifive,plic-1.0.0 in opensbi, the

  T-HEAD PLIC implementation requires setting a delegation bit to allow access

  from S-mode. So add thead,c900-plic to distinguish them.



maintainers:

  - Sagar Kadam <sagar.kadam@sifive.com>

  - Paul Walmsley  <paul.walmsley@sifive.com>
@@ -42,12 +46,17 @@ maintainers: 


properties:

  compatible:

    items:

    oneOf:

      - items:

          - enum:

              - sifive,fu540-c000-plic

              - starfive,jh7100-plic

              - canaan,k210-plic

          - const: sifive,plic-1.0.0

      - items:

          - enum:

              - allwinner,sun20i-d1-plic

          - const: thead,c900-plic



  reg:

    maxItems: 1