Commit 3214be6c authored by Sowjanya Komatineni's avatar Sowjanya Komatineni Committed by Thierry Reding
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clk: tegra: Share clk and rst register defines with Tegra clock driver 



Move CLK_OUT_ENB and RST_DEVICES registers to clk.h to share these with
Tegra clock driver.

Signed-off-by: default avatarSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent f68cbb35

drivers/clk/tegra/clk.c

+0 −45
Original line number Diff line number Diff line
@@ -16,51 +16,6 @@ 


#include "clk.h"



#define CLK_OUT_ENB_L			0x010

#define CLK_OUT_ENB_H			0x014

#define CLK_OUT_ENB_U			0x018

#define CLK_OUT_ENB_V			0x360

#define CLK_OUT_ENB_W			0x364

#define CLK_OUT_ENB_X			0x280

#define CLK_OUT_ENB_Y			0x298

#define CLK_ENB_PLLP_OUT_CPU		BIT(31)

#define CLK_OUT_ENB_SET_L		0x320

#define CLK_OUT_ENB_CLR_L		0x324

#define CLK_OUT_ENB_SET_H		0x328

#define CLK_OUT_ENB_CLR_H		0x32c

#define CLK_OUT_ENB_SET_U		0x330

#define CLK_OUT_ENB_CLR_U		0x334

#define CLK_OUT_ENB_SET_V		0x440

#define CLK_OUT_ENB_CLR_V		0x444

#define CLK_OUT_ENB_SET_W		0x448

#define CLK_OUT_ENB_CLR_W		0x44c

#define CLK_OUT_ENB_SET_X		0x284

#define CLK_OUT_ENB_CLR_X		0x288

#define CLK_OUT_ENB_SET_Y		0x29c

#define CLK_OUT_ENB_CLR_Y		0x2a0



#define RST_DEVICES_L			0x004

#define RST_DEVICES_H			0x008

#define RST_DEVICES_U			0x00C

#define RST_DEVICES_V			0x358

#define RST_DEVICES_W			0x35C

#define RST_DEVICES_X			0x28C

#define RST_DEVICES_Y			0x2a4

#define RST_DEVICES_SET_L		0x300

#define RST_DEVICES_CLR_L		0x304

#define RST_DEVICES_SET_H		0x308

#define RST_DEVICES_CLR_H		0x30c

#define RST_DEVICES_SET_U		0x310

#define RST_DEVICES_CLR_U		0x314

#define RST_DEVICES_SET_V		0x430

#define RST_DEVICES_CLR_V		0x434

#define RST_DEVICES_SET_W		0x438

#define RST_DEVICES_CLR_W		0x43c

#define RST_DEVICES_SET_X		0x290

#define RST_DEVICES_CLR_X		0x294

#define RST_DEVICES_SET_Y		0x2a8

#define RST_DEVICES_CLR_Y		0x2ac



/* Global data of Tegra CPU CAR ops */

static struct tegra_cpu_car_ops dummy_car_ops;

struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops;

drivers/clk/tegra/clk.h

+45 −0
Original line number Diff line number Diff line
@@ -10,6 +10,51 @@ 
#include <linux/clkdev.h>

#include <linux/delay.h>



#define CLK_OUT_ENB_L			0x010

#define CLK_OUT_ENB_H			0x014

#define CLK_OUT_ENB_U			0x018

#define CLK_OUT_ENB_V			0x360

#define CLK_OUT_ENB_W			0x364

#define CLK_OUT_ENB_X			0x280

#define CLK_OUT_ENB_Y			0x298

#define CLK_ENB_PLLP_OUT_CPU		BIT(31)

#define CLK_OUT_ENB_SET_L		0x320

#define CLK_OUT_ENB_CLR_L		0x324

#define CLK_OUT_ENB_SET_H		0x328

#define CLK_OUT_ENB_CLR_H		0x32c

#define CLK_OUT_ENB_SET_U		0x330

#define CLK_OUT_ENB_CLR_U		0x334

#define CLK_OUT_ENB_SET_V		0x440

#define CLK_OUT_ENB_CLR_V		0x444

#define CLK_OUT_ENB_SET_W		0x448

#define CLK_OUT_ENB_CLR_W		0x44c

#define CLK_OUT_ENB_SET_X		0x284

#define CLK_OUT_ENB_CLR_X		0x288

#define CLK_OUT_ENB_SET_Y		0x29c

#define CLK_OUT_ENB_CLR_Y		0x2a0



#define RST_DEVICES_L			0x004

#define RST_DEVICES_H			0x008

#define RST_DEVICES_U			0x00C

#define RST_DEVICES_V			0x358

#define RST_DEVICES_W			0x35C

#define RST_DEVICES_X			0x28C

#define RST_DEVICES_Y			0x2a4

#define RST_DEVICES_SET_L		0x300

#define RST_DEVICES_CLR_L		0x304

#define RST_DEVICES_SET_H		0x308

#define RST_DEVICES_CLR_H		0x30c

#define RST_DEVICES_SET_U		0x310

#define RST_DEVICES_CLR_U		0x314

#define RST_DEVICES_SET_V		0x430

#define RST_DEVICES_CLR_V		0x434

#define RST_DEVICES_SET_W		0x438

#define RST_DEVICES_CLR_W		0x43c

#define RST_DEVICES_SET_X		0x290

#define RST_DEVICES_CLR_X		0x294

#define RST_DEVICES_SET_Y		0x2a8

#define RST_DEVICES_CLR_Y		0x2ac



/**

 * struct tegra_clk_sync_source - external clock source from codec

 *