Commit 31a42c2f authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Stephen Boyd
Browse files

clk: mediatek: mux: Update parent at enable time 



The mux clocks don't always correctly take the new parent into account
when the parent is updated while the clock is disabled. Set the update
bit when enabling the clock to force an update of the mux.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210125170819.26130-3-laurent.pinchart@ideasonboard.com


Reviewed-by: default avatarWeiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 6df3c6d9

drivers/clk/mediatek/clk-mux.c

+29 −3
Original line number Diff line number Diff line
@@ -20,9 +20,33 @@ static inline struct mtk_clk_mux *to_mtk_clk_mux(struct clk_hw *hw) 
static int mtk_clk_mux_enable_setclr(struct clk_hw *hw)

{

	struct mtk_clk_mux *mux = to_mtk_clk_mux(hw);

	unsigned long flags = 0;



	if (mux->lock)

		spin_lock_irqsave(mux->lock, flags);

	else

		__acquire(mux->lock);



	return regmap_write(mux->regmap, mux->data->clr_ofs,

	regmap_write(mux->regmap, mux->data->clr_ofs,

		     BIT(mux->data->gate_shift));



	/*

	 * If the parent has been changed when the clock was disabled, it will

	 * not be effective yet. Set the update bit to ensure the mux gets

	 * updated.

	 */

	if (mux->reparent && mux->data->upd_shift >= 0) {

		regmap_write(mux->regmap, mux->data->upd_ofs,

			     BIT(mux->data->upd_shift));

		mux->reparent = false;

	}



	if (mux->lock)

		spin_unlock_irqrestore(mux->lock, flags);

	else

		__release(mux->lock);



	return 0;

}



static void mtk_clk_mux_disable_setclr(struct clk_hw *hw)
@@ -77,9 +101,11 @@ static int mtk_clk_mux_set_parent_setclr_lock(struct clk_hw *hw, u8 index) 
		regmap_write(mux->regmap, mux->data->set_ofs,

				index << mux->data->mux_shift);



		if (mux->data->upd_shift >= 0)

		if (mux->data->upd_shift >= 0) {

			regmap_write(mux->regmap, mux->data->upd_ofs,

					BIT(mux->data->upd_shift));

			mux->reparent = true;

		}

	}



	if (mux->lock)

drivers/clk/mediatek/clk-mux.h

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ struct mtk_clk_mux { 
	struct regmap *regmap;

	const struct mtk_mux *data;

	spinlock_t *lock;

	bool reparent;

};



struct mtk_mux {