Commit 315a6558 authored by Sheng Yang's avatar Sheng Yang Committed by Ingo Molnar
Browse files

x86: move VMX MSRs to msr-index.h 



They are hardware specific MSRs, and we would use them in virtualization
feature detection later.

Signed-off-by: default avatarSheng Yang <sheng.yang@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 59c37bf8

arch/x86/kvm/vmx.h

+0 −15
Original line number Diff line number Diff line
@@ -331,21 +331,6 @@ enum vmcs_field { 


#define AR_RESERVD_MASK 0xfffe0f00



#define MSR_IA32_VMX_BASIC                      0x480

#define MSR_IA32_VMX_PINBASED_CTLS              0x481

#define MSR_IA32_VMX_PROCBASED_CTLS             0x482

#define MSR_IA32_VMX_EXIT_CTLS                  0x483

#define MSR_IA32_VMX_ENTRY_CTLS                 0x484

#define MSR_IA32_VMX_MISC                       0x485

#define MSR_IA32_VMX_CR0_FIXED0                 0x486

#define MSR_IA32_VMX_CR0_FIXED1                 0x487

#define MSR_IA32_VMX_CR4_FIXED0                 0x488

#define MSR_IA32_VMX_CR4_FIXED1                 0x489

#define MSR_IA32_VMX_VMCS_ENUM                  0x48a

#define MSR_IA32_VMX_PROCBASED_CTLS2            0x48b

#define MSR_IA32_VMX_EPT_VPID_CAP               0x48c



#define MSR_IA32_FEATURE_CONTROL                0x3a

#define MSR_IA32_FEATURE_CONTROL_LOCKED         0x1

#define MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED  0x4

include/asm-x86/msr-index.h

+16 −0
Original line number Diff line number Diff line
@@ -176,6 +176,7 @@ 
#define MSR_IA32_TSC			0x00000010

#define MSR_IA32_PLATFORM_ID		0x00000017

#define MSR_IA32_EBL_CR_POWERON		0x0000002a

#define MSR_IA32_FEATURE_CONTROL        0x0000003a



#define MSR_IA32_APICBASE		0x0000001b

#define MSR_IA32_APICBASE_BSP		(1<<8)
@@ -310,4 +311,19 @@ 
/* Geode defined MSRs */

#define MSR_GEODE_BUSCONT_CONF0		0x00001900



/* Intel VT MSRs */

#define MSR_IA32_VMX_BASIC              0x00000480

#define MSR_IA32_VMX_PINBASED_CTLS      0x00000481

#define MSR_IA32_VMX_PROCBASED_CTLS     0x00000482

#define MSR_IA32_VMX_EXIT_CTLS          0x00000483

#define MSR_IA32_VMX_ENTRY_CTLS         0x00000484

#define MSR_IA32_VMX_MISC               0x00000485

#define MSR_IA32_VMX_CR0_FIXED0         0x00000486

#define MSR_IA32_VMX_CR0_FIXED1         0x00000487

#define MSR_IA32_VMX_CR4_FIXED0         0x00000488

#define MSR_IA32_VMX_CR4_FIXED1         0x00000489

#define MSR_IA32_VMX_VMCS_ENUM          0x0000048a

#define MSR_IA32_VMX_PROCBASED_CTLS2    0x0000048b

#define MSR_IA32_VMX_EPT_VPID_CAP       0x0000048c



#endif /* ASM_X86__MSR_INDEX_H */