Commit 314f6c23 authored Dec 22, 2021 by Michael Ellerman

powerpc/64s: Mask NIP before checking against SRR0

When CONFIG_PPC_RFI_SRR_DEBUG=y we check that NIP and SRR0 match when
returning from interrupts. This can trigger falsely if NIP has either of
its two low bits set via sigreturn or ptrace, while SRR0 has its low two
bits masked in hardware.

As a quick fix make sure to mask the low bits before doing the check.

Fixes: 59dc5bfc ("powerpc/64s: avoid reloading (H)SRR registers if they are still valid")
Reported-by: Sachin Sant <sachinp@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Tested-by: Sachin Sant <sachinp@linux.vnet.ibm.com>
Link: https://lore.kernel.org/r/20211221135101.2085547-1-mpe@ellerman.id.au

parent 5b09250c

arch/powerpc/kernel/interrupt_64.S

+2 −0

Original line number	Diff line number	Diff line
		@@ -30,6 +30,7 @@ COMPAT_SYS_CALL_TABLE:
		.ifc \srr,srr
		mfspr r11,SPRN_SRR0
		ld r12,_NIP(r1)
		clrrdi r12,r12,2
		100: tdne r11,r12
		EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING \| BUGFLAG_ONCE)
		mfspr r11,SPRN_SRR1
		@@ -39,6 +40,7 @@ COMPAT_SYS_CALL_TABLE:
		.else
		mfspr r11,SPRN_HSRR0
		ld r12,_NIP(r1)
		clrrdi r12,r12,2
		100: tdne r11,r12
		EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING \| BUGFLAG_ONCE)
		mfspr r11,SPRN_HSRR1