Commit 3126977d authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Split PPS write from DSC enable 



The PPS SDP is fed into the transcoder whereas the DSC
block is (or at least can be) per pipe. Let's split these
into two distinct operations in an effort to untagle the
bigjoiner mess where we have two pipes feeding a single
transcoder.

Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211022103304.24164-7-ville.syrjala@linux.intel.com
parent e0bf3e23

drivers/gpu/drm/i915/display/icl_dsi.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -1232,7 +1232,9 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state, 
	/* step5: program and powerup panel */

	/* step5: program and powerup panel */

	gen11_dsi_powerup_panel(encoder);

	gen11_dsi_powerup_panel(encoder);





	intel_dsc_enable(encoder, pipe_config);

	intel_dsc_dsi_pps_write(encoder, pipe_config);



	intel_dsc_enable(pipe_config);





	/* step6c: configure transcoder timings */

	/* step6c: configure transcoder timings */

	gen11_dsi_set_transcoder_timings(encoder, pipe_config);

	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
@@ -1628,7 +1630,7 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder, 
	/* FIXME: initialize from VBT */

	/* FIXME: initialize from VBT */

	vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;

	vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST;





	ret = intel_dsc_compute_params(encoder, crtc_state);

	ret = intel_dsc_compute_params(crtc_state);

	if (ret)

	if (ret)

		return ret;

		return ret;

drivers/gpu/drm/i915/display/intel_ddi.c

+11 −3
Original line number Original line Diff line number Diff line
@@ -2386,7 +2386,10 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state, 




	/* 5.k Configure and enable FEC if needed */

	/* 5.k Configure and enable FEC if needed */

	intel_ddi_enable_fec(encoder, crtc_state);

	intel_ddi_enable_fec(encoder, crtc_state);

	intel_dsc_enable(encoder, crtc_state);



	intel_dsc_dp_pps_write(encoder, crtc_state);



	intel_dsc_enable(crtc_state);

}

}





static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,

static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2520,8 +2523,11 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, 




	/* 7.l Configure and enable FEC if needed */

	/* 7.l Configure and enable FEC if needed */

	intel_ddi_enable_fec(encoder, crtc_state);

	intel_ddi_enable_fec(encoder, crtc_state);



	intel_dsc_dp_pps_write(encoder, crtc_state);



	if (!crtc_state->bigjoiner)

	if (!crtc_state->bigjoiner)

		intel_dsc_enable(encoder, crtc_state);

		intel_dsc_enable(crtc_state);

}

}





static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,

static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
@@ -2586,8 +2592,10 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, 
	if (!is_mst)

	if (!is_mst)

		intel_ddi_enable_pipe_clock(encoder, crtc_state);

		intel_ddi_enable_pipe_clock(encoder, crtc_state);





	intel_dsc_dp_pps_write(encoder, crtc_state);



	if (!crtc_state->bigjoiner)

	if (!crtc_state->bigjoiner)

		intel_dsc_enable(encoder, crtc_state);

		intel_dsc_enable(crtc_state);

}

}





static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,

static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,

drivers/gpu/drm/i915/display/intel_display.c

+2 −3
Original line number Original line Diff line number Diff line
@@ -1976,7 +1976,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state, 




	if (!crtc_state->bigjoiner_slave) {

	if (!crtc_state->bigjoiner_slave) {

		/* need to enable VDSC, which we skipped in pre-enable */

		/* need to enable VDSC, which we skipped in pre-enable */

		intel_dsc_enable(encoder, crtc_state);

		intel_dsc_enable(crtc_state);

	} else {

	} else {

		/*

		/*

		 * Enable sequence steps 1-7 on bigjoiner master

		 * Enable sequence steps 1-7 on bigjoiner master
@@ -1986,8 +1986,7 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state, 
			intel_enable_shared_dpll(master_crtc_state);

			intel_enable_shared_dpll(master_crtc_state);

		intel_encoders_pre_enable(state, master_crtc);

		intel_encoders_pre_enable(state, master_crtc);





		/* and DSC on slave */

		intel_dsc_enable(crtc_state);

		intel_dsc_enable(NULL, crtc_state);

	}

	}





	if (DISPLAY_VER(dev_priv) >= 13)

	if (DISPLAY_VER(dev_priv) >= 13)

drivers/gpu/drm/i915/display/intel_dp.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1345,7 +1345,7 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder, 
	else

	else

		vdsc_cfg->slice_height = 2;

		vdsc_cfg->slice_height = 2;





	ret = intel_dsc_compute_params(encoder, crtc_state);

	ret = intel_dsc_compute_params(crtc_state);

	if (ret)

	if (ret)

		return ret;

		return ret;

drivers/gpu/drm/i915/display/intel_vdsc.c

+15 −18
Original line number Original line Diff line number Diff line
@@ -442,10 +442,10 @@ calculate_rc_params(struct rc_parameters *rc, 
	}

	}

}

}





int intel_dsc_compute_params(struct intel_encoder *encoder,

int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)

			     struct intel_crtc_state *pipe_config)

{

{

	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;

	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;

	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;

	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;

	const struct rc_parameters *rc_params;

	const struct rc_parameters *rc_params;
@@ -1055,7 +1055,7 @@ static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state) 
	}

	}

}

}





static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,

void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,

			     const struct intel_crtc_state *crtc_state)

			     const struct intel_crtc_state *crtc_state)

{

{

	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;

	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
@@ -1064,6 +1064,9 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder, 
	struct drm_dsc_picture_parameter_set pps;

	struct drm_dsc_picture_parameter_set pps;

	enum port port;

	enum port port;





	if (!crtc_state->dsc.compression_enable)

		return;



	drm_dsc_pps_payload_pack(&pps, vdsc_cfg);

	drm_dsc_pps_payload_pack(&pps, vdsc_cfg);





	for_each_dsi_port(port, intel_dsi->ports) {

	for_each_dsi_port(port, intel_dsi->ports) {
@@ -1074,14 +1077,16 @@ static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder, 
	}

	}

}

}





static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,

void intel_dsc_dp_pps_write(struct intel_encoder *encoder,

			    const struct intel_crtc_state *crtc_state)

			    const struct intel_crtc_state *crtc_state)

{

{

	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);

	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);

	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);

	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;

	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;

	struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;

	struct drm_dsc_pps_infoframe dp_dsc_pps_sdp;





	if (!crtc_state->dsc.compression_enable)

		return;



	/* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */

	/* Prepare DP SDP PPS header as per DP 1.4 spec, Table 2-123 */

	drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp.pps_header);

	drm_dsc_dp_pps_header_init(&dp_dsc_pps_sdp.pps_header);
@@ -1142,8 +1147,7 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state) 
	}

	}

}

}





void intel_dsc_enable(struct intel_encoder *encoder,

void intel_dsc_enable(const struct intel_crtc_state *crtc_state)

		      const struct intel_crtc_state *crtc_state)

{

{

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1155,13 +1159,6 @@ void intel_dsc_enable(struct intel_encoder *encoder, 




	intel_dsc_pps_configure(crtc_state);

	intel_dsc_pps_configure(crtc_state);





	if (!crtc_state->bigjoiner_slave) {

		if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))

			intel_dsc_dsi_pps_write(encoder, crtc_state);

		else

			intel_dsc_dp_pps_write(encoder, crtc_state);

	}



	dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;

	dss_ctl2_val |= LEFT_BRANCH_VDSC_ENABLE;

	if (crtc_state->dsc.dsc_split) {

	if (crtc_state->dsc.dsc_split) {

		dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;

		dss_ctl2_val |= RIGHT_BRANCH_VDSC_ENABLE;