Commit 30f34909 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pm-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm 

Pull more power management updates from Rafael Wysocki:
 "These are mostly ARM cpufreq driver updates, including one new
  MediaTek driver that has just passed all of the reviews, with the
  addition of a revert of a recent intel_pstate commit, some core
  cpufreq changes and a DT-related update of the operating performance
  points (OPP) support code.

  Specifics:

   - Add new cpufreq driver for the MediaTek MT6779 platform called
     mediatek-hw along with corresponding DT bindings (Hector.Yuan).

   - Add DCVS interrupt support to the qcom-cpufreq-hw driver (Thara
     Gopinath).

   - Make the qcom-cpufreq-hw driver set the dvfs_possible_from_any_cpu
     policy flag (Taniya Das).

   - Blocklist more Qualcomm platforms in cpufreq-dt-platdev (Bjorn
     Andersson).

   - Make the vexpress cpufreq driver set the CPUFREQ_IS_COOLING_DEV
     flag (Viresh Kumar).

   - Add new cpufreq driver callback to allow drivers to register with
     the Energy Model in a consistent way and make several drivers use
     it (Viresh Kumar).

   - Change the remaining users of the .ready() cpufreq driver callback
     to move the code from it elsewhere and drop it from the cpufreq
     core (Viresh Kumar).

   - Revert recent intel_pstate change adding HWP guaranteed performance
     change notification support to it that led to problems, because the
     notification in question is triggered prematurely on some systems
     (Rafael Wysocki).

   - Convert the OPP DT bindings to DT schema and clean them up while at
     it (Rob Herring)"

* tag 'pm-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (23 commits)
  Revert "cpufreq: intel_pstate: Process HWP Guaranteed change notification"
  cpufreq: mediatek-hw: Add support for CPUFREQ HW
  cpufreq: Add of_perf_domain_get_sharing_cpumask
  dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
  cpufreq: Remove ready() callback
  cpufreq: sh: Remove sh_cpufreq_cpu_ready()
  cpufreq: acpi: Remove acpi_cpufreq_cpu_ready()
  cpufreq: qcom-hw: Set dvfs_possible_from_any_cpu cpufreq driver flag
  cpufreq: blocklist more Qualcomm platforms in cpufreq-dt-platdev
  cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support
  cpufreq: scmi: Use .register_em() to register with energy model
  cpufreq: vexpress: Use .register_em() to register with energy model
  cpufreq: scpi: Use .register_em() to register with energy model
  dt-bindings: opp: Convert to DT schema
  dt-bindings: Clean-up OPP binding node names in examples
  ARM: dts: omap: Drop references to opp.txt
  cpufreq: qcom-cpufreq-hw: Use .register_em() to register with energy model
  cpufreq: omap: Use .register_em() to register with energy model
  cpufreq: mediatek: Use .register_em() to register with energy model
  cpufreq: imx6q: Use .register_em() to register with energy model
  ...
parents 9c566611 f76c87e8

Documentation/cpu-freq/cpu-drivers.rst

+0 −3
Original line number Diff line number Diff line
@@ -75,9 +75,6 @@ And optionally 
 .resume - A pointer to a per-policy resume function which is called

 with interrupts disabled and _before_ the governor is started again.



 .ready - A pointer to a per-policy ready function which is called after

 the policy is fully initialized.



 .attr - A pointer to a NULL-terminated list of "struct freq_attr" which

 allow to export values to sysfs.

Documentation/devicetree/bindings/cpufreq/cpufreq-dt.txt

+1 −1
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ Required properties: 
- None



Optional properties:

- operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt for

- operating-points: Refer to Documentation/devicetree/bindings/opp/opp-v1.yaml for

  details. OPPs *must* be supplied either via DT, i.e. this property, or

  populated at runtime.

- clock-latency: Specify the possible maximum transition latency for clock,

Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml

0 → 100644
+70 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek's CPUFREQ Bindings



maintainers:

  - Hector Yuan <hector.yuan@mediatek.com>



description:

  CPUFREQ HW is a hardware engine used by MediaTek SoCs to

  manage frequency in hardware. It is capable of controlling

  frequency for multiple clusters.



properties:

  compatible:

    const: mediatek,cpufreq-hw



  reg:

    minItems: 1

    maxItems: 2

    description:

      Addresses and sizes for the memory of the HW bases in

      each frequency domain. Each entry corresponds to

      a register bank for each frequency domain present.



  "#performance-domain-cells":

    description:

      Number of cells in a performance domain specifier.

      Set const to 1 here for nodes providing multiple

      performance domains.

    const: 1



required:

  - compatible

  - reg

  - "#performance-domain-cells"



additionalProperties: false



examples:

  - |

    cpus {

            #address-cells = <1>;

            #size-cells = <0>;



            cpu0: cpu@0 {

                device_type = "cpu";

                compatible = "arm,cortex-a55";

                enable-method = "psci";

                performance-domains = <&performance 0>;

                reg = <0x000>;

            };

    };



    /* ... */



    soc {

        #address-cells = <2>;

        #size-cells = <2>;



        performance: performance-controller@11bc00 {

            compatible = "mediatek,cpufreq-hw";

            reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;



            #performance-domain-cells = <1>;

        };

    };

Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ Required properties: 
			  transition and not stable yet.

	Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for

	generic clock consumer properties.

- operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt

- operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml

	for detail.

- proc-supply: Regulator for Vproc of CPU cluster.

Documentation/devicetree/bindings/cpufreq/cpufreq-st.txt

+2 −4
Original line number Diff line number Diff line
@@ -6,8 +6,6 @@ from the SoC, then supplies the OPP framework with 'prop' and 'supported 
hardware' information respectively.  The framework is then able to read

the DT and operate in the usual way.



For more information about the expected DT format [See: ../opp/opp.txt].



Frequency Scaling only

----------------------
@@ -15,7 +13,7 @@ No vendor specific driver required for this. 


Located in CPU's node:



- operating-points		: [See: ../power/opp.txt]

- operating-points		: [See: ../power/opp-v1.yaml]



Example [safe]

--------------
@@ -37,7 +35,7 @@ This requires the ST CPUFreq driver to supply 'process' and 'version' info. 


Located in CPU's node:



- operating-points-v2		: [See ../power/opp.txt]

- operating-points-v2		: [See ../power/opp-v2.yaml]



Example [unsafe]

----------------