Commit 30b2d778 authored by Horatio Zhang's avatar Horatio Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: add RAS POISON interrupt funcs for jpeg_v2_6 



Add ras_poison_irq and functions.

Suggested-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarHoratio Zhang <Hongkun.Zhang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ce784421

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

+22 −6
Original line number Diff line number Diff line
@@ -102,13 +102,13 @@ static int jpeg_v2_5_sw_init(void *handle) 


		/* JPEG DJPEG POISON EVENT */

		r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i],

			VCN_2_6__SRCID_DJPEG0_POISON, &adev->jpeg.inst[i].irq);

			VCN_2_6__SRCID_DJPEG0_POISON, &adev->jpeg.inst[i].ras_poison_irq);

		if (r)

			return r;



		/* JPEG EJPEG POISON EVENT */

		r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i],

			VCN_2_6__SRCID_EJPEG0_POISON, &adev->jpeg.inst[i].irq);

			VCN_2_6__SRCID_EJPEG0_POISON, &adev->jpeg.inst[i].ras_poison_irq);

		if (r)

			return r;

	}
@@ -221,6 +221,9 @@ static int jpeg_v2_5_hw_fini(void *handle) 
		if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&

		      RREG32_SOC15(JPEG, i, mmUVD_JRBC_STATUS))

			jpeg_v2_5_set_powergating_state(adev, AMD_PG_STATE_GATE);



		if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__JPEG))

			amdgpu_irq_put(adev, &adev->jpeg.inst[i].ras_poison_irq, 0);

	}



	return 0;
@@ -569,6 +572,14 @@ static int jpeg_v2_5_set_interrupt_state(struct amdgpu_device *adev, 
	return 0;

}



static int jpeg_v2_6_set_ras_interrupt_state(struct amdgpu_device *adev,

					struct amdgpu_irq_src *source,

					unsigned int type,

					enum amdgpu_interrupt_state state)

{

	return 0;

}



static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev,

				      struct amdgpu_irq_src *source,

				      struct amdgpu_iv_entry *entry)
@@ -593,10 +604,6 @@ static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev, 
	case VCN_2_0__SRCID__JPEG_DECODE:

		amdgpu_fence_process(&adev->jpeg.inst[ip_instance].ring_dec);

		break;

	case VCN_2_6__SRCID_DJPEG0_POISON:

	case VCN_2_6__SRCID_EJPEG0_POISON:

		amdgpu_jpeg_process_poison_irq(adev, source, entry);

		break;

	default:

		DRM_ERROR("Unhandled interrupt: %d %d\n",

			  entry->src_id, entry->src_data[0]);
@@ -725,6 +732,11 @@ static const struct amdgpu_irq_src_funcs jpeg_v2_5_irq_funcs = { 
	.process = jpeg_v2_5_process_interrupt,

};



static const struct amdgpu_irq_src_funcs jpeg_v2_6_ras_irq_funcs = {

	.set = jpeg_v2_6_set_ras_interrupt_state,

	.process = amdgpu_jpeg_process_poison_irq,

};



static void jpeg_v2_5_set_irq_funcs(struct amdgpu_device *adev)

{

	int i;
@@ -735,6 +747,9 @@ static void jpeg_v2_5_set_irq_funcs(struct amdgpu_device *adev) 


		adev->jpeg.inst[i].irq.num_types = 1;

		adev->jpeg.inst[i].irq.funcs = &jpeg_v2_5_irq_funcs;



		adev->jpeg.inst[i].ras_poison_irq.num_types = 1;

		adev->jpeg.inst[i].ras_poison_irq.funcs = &jpeg_v2_6_ras_irq_funcs;

	}

}
@@ -800,6 +815,7 @@ const struct amdgpu_ras_block_hw_ops jpeg_v2_6_ras_hw_ops = { 
static struct amdgpu_jpeg_ras jpeg_v2_6_ras = {

	.ras_block = {

		.hw_ops = &jpeg_v2_6_ras_hw_ops,

		.ras_late_init = amdgpu_jpeg_ras_late_init,

	},

};