Commit 3077b1db authored by Anshuman Khandual's avatar Anshuman Khandual Committed by Catalin Marinas
Browse files

arm64/sysreg: Convert TRBMAR_EL1 register to automatic generation 



This converts TRBMAR_EL1 register to automatic generation without
causing any functional change.

Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230614065949.146187-13-anshuman.khandual@arm.com


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 46f3a5b0

arch/arm64/include/asm/sysreg.h

+0 −5
Original line number Diff line number Diff line
@@ -227,16 +227,11 @@ 


/*** End of Statistical Profiling Extension ***/



#define SYS_TRBMAR_EL1			sys_reg(3, 0, 9, 11, 4)

#define SYS_TRBTRG_EL1			sys_reg(3, 0, 9, 11, 6)

#define SYS_TRBIDR_EL1			sys_reg(3, 0, 9, 11, 7)



#define TRBSR_EL1_BSC_MASK		GENMASK(5, 0)

#define TRBSR_EL1_BSC_SHIFT		0

#define TRBMAR_EL1_SH_MASK		GENMASK(9, 8)

#define TRBMAR_EL1_SH_SHIFT		8

#define TRBMAR_EL1_Attr_MASK		GENMASK(7, 0)

#define TRBMAR_EL1_Attr_SHIFT		0

#define TRBTRG_EL1_TRG_MASK		GENMASK(31, 0)

#define TRBTRG_EL1_TRG_SHIFT		0

#define TRBIDR_EL1_F			BIT(5)

arch/arm64/tools/sysreg

+16 −0
Original line number Diff line number Diff line
@@ -2298,3 +2298,19 @@ Field 17 S 
Res0	16

Field	15:0	MSS

EndSysreg



Sysreg	TRBMAR_EL1	3	0	9	11	4

Res0	63:12

Enum	11:10	PAS

	0b00	SECURE

	0b01	NON_SECURE

	0b10	ROOT

	0b11	REALM

EndEnum

Enum	9:8	SH

	0b00	NON_SHAREABLE

	0b10	OUTER_SHAREABLE

	0b11	INNER_SHAREABLE

EndEnum

Field	7:0	Attr

EndSysreg