Commit 2fcbb038 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-urgent-2023-09-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Dave Hansen:
 "The most important fix here adds a missing CPU model to the recent
  Gather Data Sampling (GDS) mitigation list to ensure that mitigations
  are available on that CPU.

  There are also a pair of warning fixes, and closure of a covert
  channel that pops up when protection keys are disabled.

  Summary:
   - Mark all Skylake CPUs as vulnerable to GDS
   - Fix PKRU covert channel
   - Fix -Wmissing-variable-declarations warning for ia32_xyz_class
   - Fix kernel-doc annotation warning"

* tag 'x86-urgent-2023-09-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/fpu/xstate: Fix PKRU covert channel
  x86/irq/i8259: Fix kernel-doc annotation warning
  x86/speculation: Mark all Skylake CPUs as vulnerable to GDS
  x86/audit: Fix -Wmissing-variable-declarations warning for ia32_xyz_class
parents 34232fcf 18032b47

arch/x86/include/asm/audit.h

+7 −0
Original line number Diff line number Diff line
@@ -4,4 +4,11 @@ 


int ia32_classify_syscall(unsigned int syscall);



extern unsigned ia32_dir_class[];

extern unsigned ia32_write_class[];

extern unsigned ia32_read_class[];

extern unsigned ia32_chattr_class[];

extern unsigned ia32_signal_class[];





#endif /* _ASM_X86_AUDIT_H */

arch/x86/kernel/audit_64.c

+0 −5
Original line number Diff line number Diff line
@@ -63,11 +63,6 @@ int audit_classify_syscall(int abi, unsigned syscall) 
static int __init audit_classes_init(void)

{

#ifdef CONFIG_IA32_EMULATION

	extern __u32 ia32_dir_class[];

	extern __u32 ia32_write_class[];

	extern __u32 ia32_read_class[];

	extern __u32 ia32_chattr_class[];

	extern __u32 ia32_signal_class[];

	audit_register_class(AUDIT_CLASS_WRITE_32, ia32_write_class);

	audit_register_class(AUDIT_CLASS_READ_32, ia32_read_class);

	audit_register_class(AUDIT_CLASS_DIR_WRITE_32, ia32_dir_class);

arch/x86/kernel/cpu/common.c

+4 −4
Original line number Diff line number Diff line
@@ -1280,11 +1280,11 @@ static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = { 
	VULNBL_INTEL_STEPPINGS(BROADWELL_G,	X86_STEPPING_ANY,		SRBDS),

	VULNBL_INTEL_STEPPINGS(BROADWELL_X,	X86_STEPPING_ANY,		MMIO),

	VULNBL_INTEL_STEPPINGS(BROADWELL,	X86_STEPPING_ANY,		SRBDS),

	VULNBL_INTEL_STEPPINGS(SKYLAKE_L,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED),

	VULNBL_INTEL_STEPPINGS(SKYLAKE_X,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),

	VULNBL_INTEL_STEPPINGS(SKYLAKE,		X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED),

	VULNBL_INTEL_STEPPINGS(KABYLAKE_L,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED | GDS),

	VULNBL_INTEL_STEPPINGS(KABYLAKE,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED | GDS),

	VULNBL_INTEL_STEPPINGS(SKYLAKE_L,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),

	VULNBL_INTEL_STEPPINGS(SKYLAKE,		X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),

	VULNBL_INTEL_STEPPINGS(KABYLAKE_L,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),

	VULNBL_INTEL_STEPPINGS(KABYLAKE,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS | SRBDS),

	VULNBL_INTEL_STEPPINGS(CANNONLAKE_L,	X86_STEPPING_ANY,		RETBLEED),

	VULNBL_INTEL_STEPPINGS(ICELAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),

	VULNBL_INTEL_STEPPINGS(ICELAKE_D,	X86_STEPPING_ANY,		MMIO | GDS),

arch/x86/kernel/fpu/xstate.c

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ static unsigned short xsave_cpuid_features[] __initdata = { 
	[XFEATURE_ZMM_Hi256]			= X86_FEATURE_AVX512F,

	[XFEATURE_Hi16_ZMM]			= X86_FEATURE_AVX512F,

	[XFEATURE_PT_UNIMPLEMENTED_SO_FAR]	= X86_FEATURE_INTEL_PT,

	[XFEATURE_PKRU]				= X86_FEATURE_PKU,

	[XFEATURE_PKRU]				= X86_FEATURE_OSPKE,

	[XFEATURE_PASID]			= X86_FEATURE_ENQCMD,

	[XFEATURE_CET_USER]			= X86_FEATURE_SHSTK,

	[XFEATURE_XTILE_CFG]			= X86_FEATURE_AMX_TILE,

arch/x86/kernel/i8259.c

+1 −3
Original line number Diff line number Diff line
@@ -231,9 +231,7 @@ struct irq_chip i8259A_chip = { 
};



static char irq_trigger[2];

/**

 * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ

 */

/* ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ */

static void restore_ELCR(char *trigger)

{

	outb(trigger[0], PIC_ELCR1);