Commit 2fa33b35 authored by Leon Romanovsky's avatar Leon Romanovsky
Browse files

net/mlx5_fpga: Drop INNOVA IPsec support

Mellanox INNOVA IPsec cards are EOL in Nov, 2019 [1]. As such, the code
is unmaintained, untested and not in-use by any upstream/distro oriented
customers. In order to reduce code complexity, drop the kernel code.

[1] https://network.nvidia.com/related-docs/eol/LCR-000535.pdf

Link: https://lore.kernel.org/r/2afe88ec5020a491079eacf6fe3c89b64d65195c.1649232994.git.leonro@nvidia.com


Reviewed-by: default avatarRaed Salem <raeds@nvidia.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@nvidia.com>
parent 0276bd3a
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+1 −13
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ config MLX5_ACCEL
config MLX5_FPGA
	bool "Mellanox Technologies Innova support"
	depends on MLX5_CORE
	select MLX5_ACCEL
	help
	  Build support for the Innova family of network cards by Mellanox
	  Technologies. Innova network cards are comprised of a ConnectX chip
@@ -143,17 +142,6 @@ config MLX5_CORE_IPOIB
	help
	  MLX5 IPoIB offloads & acceleration support.

config MLX5_FPGA_IPSEC
	bool "Mellanox Technologies IPsec Innova support"
	depends on MLX5_CORE
	depends on MLX5_FPGA
	help
	Build IPsec support for the Innova family of network cards by Mellanox
	Technologies. Innova network cards are comprised of a ConnectX chip
	and an FPGA chip on one board. If you select this option, the
	mlx5_core driver will include the Innova FPGA core and allow building
	sandbox-specific client drivers.

config MLX5_IPSEC
	bool "Mellanox Technologies IPsec Connect-X support"
	depends on MLX5_CORE_EN
@@ -171,7 +159,7 @@ config MLX5_EN_IPSEC
	depends on MLX5_CORE_EN
	depends on XFRM_OFFLOAD
	depends on INET_ESP_OFFLOAD || INET6_ESP_OFFLOAD
	depends on MLX5_FPGA_IPSEC || MLX5_IPSEC
	depends on MLX5_IPSEC
	help
	  Build support for IPsec cryptography-offload acceleration in the NIC.
	  Note: Support for hardware with this capability needs to be selected
+0 −1
Original line number Diff line number Diff line
@@ -89,7 +89,6 @@ mlx5_core-$(CONFIG_MLX5_CORE_IPOIB) += ipoib/ipoib.o ipoib/ethtool.o ipoib/ipoib
# Accelerations & FPGA
#
mlx5_core-$(CONFIG_MLX5_IPSEC) += accel/ipsec_offload.o
mlx5_core-$(CONFIG_MLX5_FPGA_IPSEC) += fpga/ipsec.o
mlx5_core-$(CONFIG_MLX5_ACCEL)      += lib/crypto.o accel/ipsec.o

mlx5_core-$(CONFIG_MLX5_FPGA) += fpga/cmd.o fpga/core.o fpga/conn.o fpga/sdk.o
+1 −5
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@

#include "accel/ipsec.h"
#include "mlx5_core.h"
#include "fpga/ipsec.h"
#include "accel/ipsec_offload.h"

void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
@@ -43,10 +42,7 @@ void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
	const struct mlx5_accel_ipsec_ops *ipsec_ops;
	int err = 0;

	ipsec_ops = (mlx5_ipsec_offload_ops(mdev)) ?
		     mlx5_ipsec_offload_ops(mdev) :
		     mlx5_fpga_ipsec_ops(mdev);

	ipsec_ops = mlx5_ipsec_offload_ops(mdev);
	if (!ipsec_ops || !ipsec_ops->init) {
		mlx5_core_dbg(mdev, "IPsec ops is not supported\n");
		return;
+0 −7
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@
#include "en/port.h"
#include "en_accel/en_accel.h"
#include "accel/ipsec.h"
#include "fpga/ipsec.h"

static bool mlx5e_rx_is_xdp(struct mlx5e_params *params,
			    struct mlx5e_xsk_param *xsk)
@@ -327,9 +326,6 @@ bool mlx5e_striding_rq_possible(struct mlx5_core_dev *mdev,
	if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
		return false;

	if (mlx5_fpga_is_ipsec_device(mdev))
		return false;

	if (params->xdp_prog) {
		/* XSK params are not considered here. If striding RQ is in use,
		 * and an XSK is being opened, mlx5e_rx_mpwqe_is_linear_skb will
@@ -423,9 +419,6 @@ static int mlx5e_build_rq_frags_info(struct mlx5_core_dev *mdev,
	int max_mtu;
	int i;

	if (mlx5_fpga_is_ipsec_device(mdev))
		byte_count += MLX5E_METADATA_ETHER_LEN;

	if (mlx5e_rx_is_linear_skb(params, xsk)) {
		int frag_stride;

+1 −16
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@
#include "accel/ipsec.h"
#include "fpga/sdk.h"
#include "en_accel/ipsec.h"
#include "fpga/ipsec.h"

static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {
	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_in_packets) },
@@ -105,7 +104,7 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_sw)

static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_hw)
{
	return (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev)) ? NUM_IPSEC_HW_COUNTERS : 0;
	return 0;
}

static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_hw)
@@ -121,25 +120,11 @@ static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_hw)

static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ipsec_hw)
{
	unsigned int i;

	if (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev))
		for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
			strcpy(data + (idx++) * ETH_GSTRING_LEN,
			       mlx5e_ipsec_hw_stats_desc[i].format);

	return idx;
}

static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_hw)
{
	int i;

	if (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev))
		for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
			data[idx++] = MLX5E_READ_CTR64_CPU(&priv->ipsec->stats,
							   mlx5e_ipsec_hw_stats_desc,
							   i);
	return idx;
}

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