Commit 2fa1cd3b authored by Zhengchao Shao's avatar Zhengchao Shao Committed by Jakub Kicinski
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net: hinic: remove unused macro 



remove unused macro.

Signed-off-by: default avatarZhengchao Shao <shaozhengchao@huawei.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 2b291ee6

drivers/net/ethernet/huawei/hinic/hinic_debugfs.h

+0 −1
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ 
#define    TBL_ID_FUNC_CFG_SM_INST                      1



#define HINIC_FUNCTION_CONFIGURE_TABLE_SIZE             64

#define HINIC_FUNCTION_CONFIGURE_TABLE			1



struct hinic_cmd_lt_rd {

	u8	status;

drivers/net/ethernet/huawei/hinic/hinic_ethtool.c

+0 −1
Original line number Diff line number Diff line
@@ -55,7 +55,6 @@ 
#define COALESCE_ALL_QUEUE		0xFFFF

#define COALESCE_MAX_PENDING_LIMIT	(255 * COALESCE_PENDING_LIMIT_UNIT)

#define COALESCE_MAX_TIMER_CFG		(255 * COALESCE_TIMER_CFG_UNIT)

#define OBJ_STR_MAX_LEN			32



struct hw2ethtool_link_mode {

	enum ethtool_link_mode_bit_indices link_mode_bit;

drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h

+0 −1
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@ 
	(HINIC_DMA_ATTR_BASE + (idx) * HINIC_DMA_ATTR_STRIDE)



#define HINIC_PPF_ELECTION_STRIDE                       0x4

#define HINIC_CSR_MAX_PORTS                             4



#define HINIC_CSR_PPF_ELECTION_ADDR(idx)                \

	(HINIC_ELECTION_BASE +  (idx) * HINIC_PPF_ELECTION_STRIDE)

drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c

+0 −1
Original line number Diff line number Diff line
@@ -29,7 +29,6 @@ 
#include "hinic_hw_io.h"

#include "hinic_hw_dev.h"



#define IO_STATUS_TIMEOUT               100

#define OUTBOUND_STATE_TIMEOUT          100

#define DB_STATE_TIMEOUT                100

drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c

+0 −5
Original line number Diff line number Diff line
@@ -117,7 +117,6 @@ enum hinic_mbox_tx_status { 
#define MBOX_WB_STATUS_MASK			0xFF

#define MBOX_WB_ERROR_CODE_MASK			0xFF00

#define MBOX_WB_STATUS_FINISHED_SUCCESS		0xFF

#define MBOX_WB_STATUS_FINISHED_WITH_ERR	0xFE

#define MBOX_WB_STATUS_NOT_FINISHED		0x00



#define MBOX_STATUS_FINISHED(wb)	\
@@ -130,11 +129,8 @@ enum hinic_mbox_tx_status { 
#define SEQ_ID_START_VAL			0

#define SEQ_ID_MAX_VAL				42



#define DST_AEQ_IDX_DEFAULT_VAL			0

#define SRC_AEQ_IDX_DEFAULT_VAL			0

#define NO_DMA_ATTRIBUTE_VAL			0



#define HINIC_MGMT_RSP_AEQN			0

#define HINIC_MBOX_RSP_AEQN			2

#define HINIC_MBOX_RECV_AEQN			0
@@ -146,7 +142,6 @@ enum hinic_mbox_tx_status { 


#define IS_PF_OR_PPF_SRC(src_func_idx)	((src_func_idx) < HINIC_MAX_PF_FUNCS)



#define MBOX_RESPONSE_ERROR		0x1

#define MBOX_MSG_ID_MASK		0xFF

#define MBOX_MSG_ID(func_to_func)	((func_to_func)->send_msg_id)

#define MBOX_MSG_ID_INC(func_to_func_mbox) (MBOX_MSG_ID(func_to_func_mbox) = \