Commit 2f25d8ce authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/smu10: fix SoC/fclk units in auto mode 



SMU takes clock limits in Mhz units.  socclk and fclk were
using 10 khz units in some cases.  Switch to Mhz units.
Fixes higher than required SoC clocks.

Fixes: 97cf3299 ("drm/amd/pm: Removed fixed clock in auto mode DPM")
Reviewed-by: default avatarPaul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 28c25238

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c

+4 −4
Original line number Diff line number Diff line
@@ -773,13 +773,13 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, 
		smum_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SetHardMinFclkByFreq,

						hwmgr->display_config->num_display > 3 ?

						data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk :

						(data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk / 100) :

						min_mclk,

						NULL);



		smum_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SetHardMinSocclkByFreq,

						data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk,

						data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk / 100,

						NULL);

		smum_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SetHardMinVcn,
@@ -792,11 +792,11 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, 
						NULL);

		smum_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SetSoftMaxFclkByFreq,

						data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk,

						data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk / 100,

						NULL);

		smum_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SetSoftMaxSocclkByFreq,

						data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk,

						data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk / 100,

						NULL);

		smum_send_msg_to_smc_with_parameter(hwmgr,

						PPSMC_MSG_SetSoftMaxVcn,