Commit 2f23a7c9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-urgent-2022-08-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull misc x86 fixes from Ingo Molnar:

 - Fix PAT on Xen, which caused i915 driver failures

 - Fix compat INT 80 entry crash on Xen PV guests

 - Fix 'MMIO Stale Data' mitigation status reporting on older Intel CPUs

 - Fix RSB stuffing regressions

 - Fix ORC unwinding on ftrace trampolines

 - Add Intel Raptor Lake CPU model number

 - Fix (work around) a SEV-SNP bootloader bug providing bogus values in
   boot_params->cc_blob_address, by ignoring the value on !SEV-SNP
   bootups.

 - Fix SEV-SNP early boot failure

 - Fix the objtool list of noreturn functions and annotate snp_abort(),
   which bug confused objtool on gcc-12.

 - Fix the documentation for retbleed

* tag 'x86-urgent-2022-08-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  Documentation/ABI: Mention retbleed vulnerability info file for sysfs
  x86/sev: Mark snp_abort() noreturn
  x86/sev: Don't use cc_platform_has() for early SEV-SNP calls
  x86/boot: Don't propagate uninitialized boot_params->cc_blob_address
  x86/cpu: Add new Raptor Lake CPU model number
  x86/unwind/orc: Unwind ftrace trampolines with correct ORC entry
  x86/nospec: Fix i386 RSB stuffing
  x86/nospec: Unwreck the RSB stuffing
  x86/bugs: Add "unknown" reporting for MMIO Stale Data
  x86/entry: Fix entry_INT80_compat for Xen PV guests
  x86/PAT: Have pat_enabled() properly reflect state when running on Xen
parents 4459d800 00da0cb3

Documentation/ABI/testing/sysfs-devices-system-cpu

+1 −0
Original line number Diff line number Diff line
@@ -523,6 +523,7 @@ What: /sys/devices/system/cpu/vulnerabilities 
		/sys/devices/system/cpu/vulnerabilities/tsx_async_abort

		/sys/devices/system/cpu/vulnerabilities/itlb_multihit

		/sys/devices/system/cpu/vulnerabilities/mmio_stale_data

		/sys/devices/system/cpu/vulnerabilities/retbleed

Date:		January 2018

Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>

Description:	Information about CPU vulnerabilities

Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst

+14 −0
Original line number Diff line number Diff line
@@ -230,6 +230,20 @@ The possible values in this file are: 
     * - 'Mitigation: Clear CPU buffers'

       - The processor is vulnerable and the CPU buffer clearing mitigation is

         enabled.

     * - 'Unknown: No mitigations'

       - The processor vulnerability status is unknown because it is

	 out of Servicing period. Mitigation is not attempted.



Definitions:

------------



Servicing period: The process of providing functional and security updates to

Intel processors or platforms, utilizing the Intel Platform Update (IPU)

process or other similar mechanisms.



End of Servicing Updates (ESU): ESU is the date at which Intel will no

longer provide Servicing, such as through IPU or other similar update

processes. ESU dates will typically be aligned to end of quarter.



If the processor is vulnerable then the following information is appended to

the above information:

arch/x86/boot/compressed/misc.h

+11 −1
Original line number Diff line number Diff line
@@ -132,7 +132,17 @@ void snp_set_page_private(unsigned long paddr); 
void snp_set_page_shared(unsigned long paddr);

void sev_prep_identity_maps(unsigned long top_level_pgt);

#else

static inline void sev_enable(struct boot_params *bp) { }

static inline void sev_enable(struct boot_params *bp)

{

	/*

	 * bp->cc_blob_address should only be set by boot/compressed kernel.

	 * Initialize it to 0 unconditionally (thus here in this stub too) to

	 * ensure that uninitialized values from buggy bootloaders aren't

	 * propagated.

	 */

	if (bp)

		bp->cc_blob_address = 0;

}

static inline void sev_es_shutdown_ghcb(void) { }

static inline bool sev_es_check_ghcb_fault(unsigned long address)

{

arch/x86/boot/compressed/sev.c

+8 −0
Original line number Diff line number Diff line
@@ -276,6 +276,14 @@ void sev_enable(struct boot_params *bp) 
	struct msr m;

	bool snp;



	/*

	 * bp->cc_blob_address should only be set by boot/compressed kernel.

	 * Initialize it to 0 to ensure that uninitialized values from

	 * buggy bootloaders aren't propagated.

	 */

	if (bp)

		bp->cc_blob_address = 0;



	/*

	 * Setup/preliminary detection of SNP. This will be sanity-checked

	 * against CPUID/MSR values later.

arch/x86/entry/entry_64_compat.S

+1 −1
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@@ -311,7 +311,7 @@ SYM_CODE_START(entry_INT80_compat) 
	 * Interrupts are off on entry.

	 */

	ASM_CLAC			/* Do this early to minimize exposure */

	SWAPGS

	ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV



	/*

	 * User tracing code (ptrace or signal handlers) might assume that