Commit 2efafc66 authored by Chengchang Tang's avatar Chengchang Tang Committed by Juan Zhou
Browse files

RDMA/hns: Refactor hns_roce_alloc_ucontext() 

driver inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I98RAX



--------------------------------------------------------------------------

In the hns_roce_alloc_ucontext() function, the configuration
code is too much. Extract this part of the code into the function
hns_roce_get_uctx_config() to improve readability.

Signed-off-by: default avatarChengchang Tang <tangchengchang@huawei.com>
Signed-off-by: default avatarJuan Zhou <zhoujuan51@h-partners.com>
parent 459c5f61

drivers/infiniband/hw/hns/hns_roce_main.c

+32 −24
Original line number Diff line number Diff line
@@ -451,6 +451,37 @@ static int hns_roce_alloc_reset_entry(struct ib_ucontext *uctx) 
	return 0;

}



static void hns_roce_get_uctx_config(struct hns_roce_dev *hr_dev,

				struct hns_roce_ucontext *context,

				struct hns_roce_ib_alloc_ucontext *ucmd,

				struct hns_roce_ib_alloc_ucontext_resp *resp)

{

	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)

		context->config = ucmd->config & HNS_ROCE_EXSGE_FLAGS;



	if (context->config & HNS_ROCE_EXSGE_FLAGS) {

		resp->config |= HNS_ROCE_RSP_EXSGE_FLAGS;

		resp->max_inline_data = hr_dev->caps.max_sq_inline;

	}



	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE) {

		context->config |= ucmd->config & HNS_ROCE_RQ_INLINE_FLAGS;

		if (context->config & HNS_ROCE_RQ_INLINE_FLAGS)

			resp->config |= HNS_ROCE_RSP_RQ_INLINE_FLAGS;

	}



	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQE_INLINE) {

		context->config |= ucmd->config & HNS_ROCE_CQE_INLINE_FLAGS;

		if (context->config & HNS_ROCE_CQE_INLINE_FLAGS)

			resp->config |= HNS_ROCE_RSP_CQE_INLINE_FLAGS;

	}



	if (ucmd->config & HNS_ROCE_UCTX_DYN_QP_PGSZ) {

		context->config |= HNS_ROCE_UCTX_DYN_QP_PGSZ;

		resp->config |=  HNS_ROCE_UCTX_RSP_DYN_QP_PGSZ;

	}

}



static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx,

				   struct ib_udata *udata)

{
@@ -472,33 +503,10 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, 
	if (ret)

		goto error_out;



	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)

		context->config = ucmd.config & HNS_ROCE_EXSGE_FLAGS;



	if (context->config & HNS_ROCE_EXSGE_FLAGS) {

		resp.config |= HNS_ROCE_RSP_EXSGE_FLAGS;

		resp.max_inline_data = hr_dev->caps.max_sq_inline;

	}



	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE) {

		context->config |= ucmd.config & HNS_ROCE_RQ_INLINE_FLAGS;

		if (context->config & HNS_ROCE_RQ_INLINE_FLAGS)

			resp.config |= HNS_ROCE_RSP_RQ_INLINE_FLAGS;

	}



	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQE_INLINE) {

		context->config |= ucmd.config & HNS_ROCE_CQE_INLINE_FLAGS;

		if (context->config & HNS_ROCE_CQE_INLINE_FLAGS)

			resp.config |= HNS_ROCE_RSP_CQE_INLINE_FLAGS;

	}



	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)

		resp.congest_type = hr_dev->caps.cong_cap;



	if (ucmd.config & HNS_ROCE_UCTX_DYN_QP_PGSZ) {

		context->config |= HNS_ROCE_UCTX_DYN_QP_PGSZ;

		resp.config |=  HNS_ROCE_UCTX_RSP_DYN_QP_PGSZ;

	}

	hns_roce_get_uctx_config(hr_dev, context, &ucmd, &resp);



	ret = hns_roce_uar_alloc(hr_dev, &context->uar);

	if (ret)