Commit 2ec5b3dc authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Rob Clark
Browse files

drm/msm: add disp snapshot points across dpu driver 



Add snapshot points across dpu driver to trigger dumps when critical
errors are hit.

changes in v5:
 - change the callers to use the snapshot function directly

Signed-off-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/1618606645-19695-8-git-send-email-abhinavk@codeaurora.org


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent d87fe031

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+13 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2014-2018, 2020-2021 The Linux Foundation. All rights reserved.

 * Copyright (C) 2013 Red Hat

 * Author: Rob Clark <robdclark@gmail.com>

 */
@@ -26,6 +26,7 @@ 
#include "dpu_crtc.h"

#include "dpu_trace.h"

#include "dpu_core_irq.h"

#include "disp/msm_disp_snapshot.h"



#define DPU_DEBUG_ENC(e, fmt, ...) DPU_DEBUG("enc%d " fmt,\

		(e) ? (e)->base.base.id : -1, ##__VA_ARGS__)
@@ -1336,6 +1337,11 @@ static void dpu_encoder_underrun_callback(struct drm_encoder *drm_enc, 


	DPU_ATRACE_BEGIN("encoder_underrun_callback");

	atomic_inc(&phy_enc->underrun_cnt);



	/* trigger dump only on the first underrun */

	if (atomic_read(&phy_enc->underrun_cnt) == 1)

		msm_disp_snapshot_state(drm_enc->dev);



	trace_dpu_enc_underrun_cb(DRMID(drm_enc),

				  atomic_read(&phy_enc->underrun_cnt));

	DPU_ATRACE_END("encoder_underrun_callback");
@@ -1565,19 +1571,23 @@ static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc) 
	struct dpu_encoder_virt *dpu_enc;

	struct dpu_hw_ctl *ctl;

	int rc;

	struct drm_encoder *drm_enc;



	dpu_enc = to_dpu_encoder_virt(phys_enc->parent);

	ctl = phys_enc->hw_ctl;

	drm_enc = phys_enc->parent;



	if (!ctl->ops.reset)

		return;



	DRM_DEBUG_KMS("id:%u ctl %d reset\n", DRMID(phys_enc->parent),

	DRM_DEBUG_KMS("id:%u ctl %d reset\n", DRMID(drm_enc),

		      ctl->idx);



	rc = ctl->ops.reset(ctl);

	if (rc)

	if (rc) {

		DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n",  ctl->idx);

		msm_disp_snapshot_state(drm_enc->dev);

	}



	phys_enc->enable_state = DPU_ENC_ENABLED;

}

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+9 −5
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2018, 2020-2021 The Linux Foundation. All rights reserved.

 */



#define pr_fmt(fmt)	"[drm:%s:%d] " fmt, __func__, __LINE__
@@ -11,6 +11,7 @@ 
#include "dpu_core_irq.h"

#include "dpu_formats.h"

#include "dpu_trace.h"

#include "disp/msm_disp_snapshot.h"



#define DPU_DEBUG_CMDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \

		(e) && (e)->base.parent ? \
@@ -191,10 +192,13 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( 
			to_dpu_encoder_phys_cmd(phys_enc);

	u32 frame_event = DPU_ENCODER_FRAME_EVENT_ERROR;

	bool do_log = false;

	struct drm_encoder *drm_enc;



	if (!phys_enc->hw_pp)

		return -EINVAL;



	drm_enc = phys_enc->parent;



	cmd_enc->pp_timeout_report_cnt++;

	if (cmd_enc->pp_timeout_report_cnt == PP_TIMEOUT_MAX_TRIALS) {

		frame_event |= DPU_ENCODER_FRAME_EVENT_PANEL_DEAD;
@@ -203,7 +207,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( 
		do_log = true;

	}



	trace_dpu_enc_phys_cmd_pdone_timeout(DRMID(phys_enc->parent),

	trace_dpu_enc_phys_cmd_pdone_timeout(DRMID(drm_enc),

		     phys_enc->hw_pp->idx - PINGPONG_0,

		     cmd_enc->pp_timeout_report_cnt,

		     atomic_read(&phys_enc->pending_kickoff_cnt),
@@ -212,12 +216,12 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( 
	/* to avoid flooding, only log first time, and "dead" time */

	if (do_log) {

		DRM_ERROR("id:%d pp:%d kickoff timeout %d cnt %d koff_cnt %d\n",

			  DRMID(phys_enc->parent),

			  DRMID(drm_enc),

			  phys_enc->hw_pp->idx - PINGPONG_0,

			  phys_enc->hw_ctl->idx - CTL_0,

			  cmd_enc->pp_timeout_report_cnt,

			  atomic_read(&phys_enc->pending_kickoff_cnt));



		msm_disp_snapshot_state(drm_enc->dev);

		dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR);

	}
@@ -228,7 +232,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout( 


	if (phys_enc->parent_ops->handle_frame_done)

		phys_enc->parent_ops->handle_frame_done(

				phys_enc->parent, phys_enc, frame_event);

				drm_enc, phys_enc, frame_event);



	return -ETIMEDOUT;

}

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+7 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2018, 2020-2021 The Linux Foundation. All rights reserved.

 */



#define pr_fmt(fmt)	"[drm:%s:%d] " fmt, __func__, __LINE__
@@ -9,6 +9,7 @@ 
#include "dpu_core_irq.h"

#include "dpu_formats.h"

#include "dpu_trace.h"

#include "disp/msm_disp_snapshot.h"



#define DPU_DEBUG_VIDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \

		(e) && (e)->parent ? \
@@ -468,6 +469,7 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc) 
		"update pending flush ctl %d intf %d\n",

		ctl->idx - CTL_0, phys_enc->hw_intf->idx);



	atomic_set(&phys_enc->underrun_cnt, 0);



	/* ctl_flush & timing engine enable will be triggered by framework */

	if (phys_enc->enable_state == DPU_ENC_DISABLED)
@@ -537,6 +539,9 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff( 
{

	struct dpu_hw_ctl *ctl;

	int rc;

	struct drm_encoder *drm_enc;



	drm_enc = phys_enc->parent;



	ctl = phys_enc->hw_ctl;

	if (!ctl->ops.wait_reset_status)
@@ -550,6 +555,7 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff( 
	if (rc) {

		DPU_ERROR_VIDENC(phys_enc, "ctl %d reset failure: %d\n",

				ctl->idx, rc);

		msm_disp_snapshot_state(drm_enc->dev);

		dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_VSYNC);

	}

}