Commit 2e87309e authored by Alyssa Rosenzweig's avatar Alyssa Rosenzweig
Browse files

drm/panfrost: Handle IDVS_GROUP_SIZE feature



The IDVS group size feature was missing. It is used on some Bifrost and
Valhall GPUs, and is the last kernel-relevant Bifrost feature we're
missing.

This feature adds an extra IDVS group size field to the JM_CONFIG
register. In kbase, the value is configurable via the device tree; kbase
uses 0xF as a default if no value is specified. Until we find a device
demanding otherwise, let's always set the 0xF default on devices which
support this feature mimicking kbase's behaviour.

Tuning this register slightly improves performance of index-driven
vertex shading. On Mali-G52 (with Mesa), overall glmark2 score is
improved from 1026 to 1037. Geometry-heavy scenes like -bshading are
improved from 1068 to 1098.

Signed-off-by: default avatarAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: default avatarSteven Price <steven.price@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220211145849.3148-1-alyssa.rosenzweig@collabora.com
parent 721255b5
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+3 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ enum panfrost_hw_feature {
	HW_FEATURE_AARCH64_MMU,
	HW_FEATURE_TLS_HASHING,
	HW_FEATURE_THREAD_GROUP_SPLIT,
	HW_FEATURE_IDVS_GROUP_SIZE,
	HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG,
};

@@ -74,6 +75,7 @@ enum panfrost_hw_feature {
	BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
	BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
	BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
	BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \
	BIT_ULL(HW_FEATURE_COHERENCY_REG))

#define hw_features_g76 (\
@@ -87,6 +89,7 @@ enum panfrost_hw_feature {
	BIT_ULL(HW_FEATURE_COHERENCY_REG) | \
	BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
	BIT_ULL(HW_FEATURE_TLS_HASHING) | \
	BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \
	BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG))

#define hw_features_g31 (\
+3 −0
Original line number Diff line number Diff line
@@ -145,6 +145,9 @@ static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev)
		quirks |= (COHERENCY_ACE_LITE | COHERENCY_ACE) <<
			   JM_FORCE_COHERENCY_FEATURES_SHIFT;

	if (panfrost_has_hw_feature(pfdev, HW_FEATURE_IDVS_GROUP_SIZE))
		quirks |= JM_DEFAULT_IDVS_GROUP_SIZE << JM_IDVS_GROUP_SIZE_SHIFT;

	if (quirks)
		gpu_write(pfdev, GPU_JM_CONFIG, quirks);

+1 −0
Original line number Diff line number Diff line
@@ -208,6 +208,7 @@
#define JM_MAX_JOB_THROTTLE_LIMIT	0x3F
#define JM_FORCE_COHERENCY_FEATURES_SHIFT 2
#define JM_IDVS_GROUP_SIZE_SHIFT	16
#define JM_DEFAULT_IDVS_GROUP_SIZE	0xF
#define JM_MAX_IDVS_GROUP_SIZE		0x3F