Commit 2e64066d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-6.1-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V updates from Palmer Dabbelt:

 - Improvements to the CPU topology subsystem, which fix some issues
   where RISC-V would report bad topology information.

 - The default NR_CPUS has increased to XLEN, and the maximum
   configurable value is 512.

 - The CD-ROM filesystems have been enabled in the defconfig.

 - Support for THP_SWAP has been added for rv64 systems.

There are also a handful of cleanups and fixes throughout the tree.

* tag 'riscv-for-linus-6.1-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: enable THP_SWAP for RV64
  RISC-V: Print SSTC in canonical order
  riscv: compat: s/failed/unsupported if compat mode isn't supported
  RISC-V: Increase range and default value of NR_CPUS
  cpuidle: riscv-sbi: Fix CPU_PM_CPU_IDLE_ENTER_xyz() macro usage
  perf: RISC-V: throttle perf events
  perf: RISC-V: exclude invalid pmu counters from SBI calls
  riscv: enable CD-ROM file systems in defconfig
  riscv: topology: fix default topology reporting
  arm64: topology: move store_cpu_topology() to shared code
parents 57c92724 87f81e66

arch/arm64/kernel/topology.c

+0 −40
Original line number Diff line number Diff line
@@ -22,46 +22,6 @@ 
#include <asm/cputype.h>

#include <asm/topology.h>



void store_cpu_topology(unsigned int cpuid)

{

	struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];

	u64 mpidr;



	if (cpuid_topo->package_id != -1)

		goto topology_populated;



	mpidr = read_cpuid_mpidr();



	/* Uniprocessor systems can rely on default topology values */

	if (mpidr & MPIDR_UP_BITMASK)

		return;



	/*

	 * This would be the place to create cpu topology based on MPIDR.

	 *

	 * However, it cannot be trusted to depict the actual topology; some

	 * pieces of the architecture enforce an artificial cap on Aff0 values

	 * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an

	 * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up

	 * having absolutely no relationship to the actual underlying system

	 * topology, and cannot be reasonably used as core / package ID.

	 *

	 * If the MT bit is set, Aff0 *could* be used to define a thread ID, but

	 * we still wouldn't be able to obtain a sane core ID. This means we

	 * need to entirely ignore MPIDR for any topology deduction.

	 */

	cpuid_topo->thread_id  = -1;

	cpuid_topo->core_id    = cpuid;

	cpuid_topo->package_id = cpu_to_node(cpuid);



	pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",

		 cpuid, cpuid_topo->package_id, cpuid_topo->core_id,

		 cpuid_topo->thread_id, mpidr);



topology_populated:

	update_siblings_masks(cpuid);

}



#ifdef CONFIG_ACPI

static bool __init acpi_cpu_is_threaded(int cpu)

{

arch/riscv/Kconfig

+8 −4
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ config RISCV 
	select ARCH_WANT_FRAME_POINTERS

	select ARCH_WANT_GENERAL_HUGETLB

	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT

	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE

	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU

	select BUILDTIME_TABLE_SORT if MMU

	select CLONE_BACKWARDS
@@ -52,7 +53,7 @@ config RISCV 
	select COMMON_CLK

	select CPU_PM if CPU_IDLE

	select EDAC_SUPPORT

	select GENERIC_ARCH_TOPOLOGY if SMP

	select GENERIC_ARCH_TOPOLOGY

	select GENERIC_ATOMIC64 if !64BIT

	select GENERIC_CLOCKEVENTS_BROADCAST if SMP

	select GENERIC_EARLY_IOREMAP
@@ -309,10 +310,13 @@ config SMP 
	  If you don't know what to do here, say N.



config NR_CPUS

	int "Maximum number of CPUs (2-32)"

	range 2 32

	int "Maximum number of CPUs (2-512)"

	depends on SMP

	default "8"

	range 2 512 if !SBI_V01

	range 2 32 if SBI_V01 && 32BIT

	range 2 64 if SBI_V01 && 64BIT

	default "32" if 32BIT

	default "64" if 64BIT



config HOTPLUG_CPU

	bool "Support for hot-pluggable CPUs"

arch/riscv/configs/defconfig

+3 −0
Original line number Diff line number Diff line
@@ -166,6 +166,9 @@ CONFIG_BTRFS_FS=m 
CONFIG_BTRFS_FS_POSIX_ACL=y

CONFIG_AUTOFS4_FS=y

CONFIG_OVERLAY_FS=m

CONFIG_ISO9660_FS=y

CONFIG_JOLIET=y

CONFIG_ZISOFS=y

CONFIG_MSDOS_FS=y

CONFIG_VFAT_FS=y

CONFIG_TMPFS=y

arch/riscv/kernel/cpu.c

+1 −1
Original line number Diff line number Diff line
@@ -92,10 +92,10 @@ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid) 
 */

static struct riscv_isa_ext_data isa_ext_arr[] = {

	__RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),

	__RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),

	__RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),

	__RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),

	__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),

	__RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),

	__RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),

};

arch/riscv/kernel/process.c

+1 −1
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ static int __init compat_mode_detect(void) 
	csr_write(CSR_STATUS, tmp);



	pr_info("riscv: ELF compat mode %s",

			compat_mode_supported ? "supported" : "failed");

			compat_mode_supported ? "supported" : "unsupported");



	return 0;

}