Unverified Commit 2e4beeb3 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!11531 [OLK-6.6]Some updates for HiSilicon PCIe PMU 

Merge Pull Request from: @zhangqizhi3 
 
This series includes several updates to the HiSilicon PCIe PMU:
- PATCH 1/3 fixes error count if user specifies unsupported event

PATCH 2/3 Fixed the problem that TLP headers are not supported, only bandwidth counting is supported.
PATCH 3/3 Exporting the BDF Range of the Root Port Supported by the PMU 
 
Link:https://gitee.com/openeuler/kernel/pulls/11531

 

Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 8f0f8043 177a4b03

Documentation/admin-guide/perf/hisi-pcie-pmu.rst

+3 −1
Original line number Diff line number Diff line
@@ -28,7 +28,9 @@ The "identifier" sysfs file allows users to identify the version of the 
PMU hardware device.



The "bus" sysfs file allows users to get the bus number of Root Ports

monitored by PMU.

monitored by PMU. Furthermore users can get the Root Ports range in

[bdf_min, bdf_max] from "bdf_min" and "bdf_max" sysfs attributes

respectively.



Example usage of perf::

drivers/perf/hisilicon/hisi_pcie_pmu.c

+33 −1
Original line number Diff line number Diff line
@@ -152,6 +152,22 @@ static ssize_t bus_show(struct device *dev, struct device_attribute *attr, char 
}

static DEVICE_ATTR_RO(bus);



static ssize_t bdf_min_show(struct device *dev, struct device_attribute *attr, char *buf)

{

	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(dev_get_drvdata(dev));



	return sysfs_emit(buf, "%#04x\n", pcie_pmu->bdf_min);

}

static DEVICE_ATTR_RO(bdf_min);



static ssize_t bdf_max_show(struct device *dev, struct device_attribute *attr, char *buf)

{

	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(dev_get_drvdata(dev));



	return sysfs_emit(buf, "%#04x\n", pcie_pmu->bdf_max);

}

static DEVICE_ATTR_RO(bdf_max);



static struct hisi_pcie_reg_pair

hisi_pcie_parse_reg_value(struct hisi_pcie_pmu *pcie_pmu, u32 reg_off)

{
@@ -219,7 +235,7 @@ static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, 
static u64 hisi_pcie_pmu_get_event_ctrl_val(struct perf_event *event)

{

	u64 port, trig_len, thr_len, len_mode;

	u64 reg = HISI_PCIE_INIT_SET;

	u64 reg = 0;



	/* Config HISI_PCIE_EVENT_CTRL according to event. */

	reg |= FIELD_PREP(HISI_PCIE_EVENT_M, hisi_pcie_get_real_event(event));
@@ -463,10 +479,24 @@ static void hisi_pcie_pmu_set_period(struct perf_event *event) 
	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);

	struct hw_perf_event *hwc = &event->hw;

	int idx = hwc->idx;

	u64 orig_cnt, cnt;



	orig_cnt = hisi_pcie_pmu_read_counter(event);



	local64_set(&hwc->prev_count, HISI_PCIE_INIT_VAL);

	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_CNT, idx, HISI_PCIE_INIT_VAL);

	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_EXT_CNT, idx, HISI_PCIE_INIT_VAL);



	/*

	 * The counter maybe unwritable if the target event is unsupported.

	 * Check this by comparing the counts after setting the period. If

	 * the counts stay unchanged after setting the period then update

	 * the hwc->prev_count correctly. Otherwise the final counts user

	 * get maybe totally wrong.

	 */

	cnt = hisi_pcie_pmu_read_counter(event);

	if (orig_cnt == cnt)

		local64_set(&hwc->prev_count, cnt);

}



static void hisi_pcie_pmu_enable_counter(struct hisi_pcie_pmu *pcie_pmu, struct hw_perf_event *hwc)
@@ -761,6 +791,8 @@ static const struct attribute_group hisi_pcie_pmu_format_group = { 


static struct attribute *hisi_pcie_pmu_bus_attrs[] = {

	&dev_attr_bus.attr,

	&dev_attr_bdf_max.attr,

	&dev_attr_bdf_min.attr,

	NULL

};